Kay Suenaga

According to our database, Kay Suenaga authored at least 8 papers between 2007 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A Bulk-Controlled Low-Voltage CMOS Quadrature Oscillator.

Rodrigo Picos, M. A. Calafat, Kay Suenaga, Sebastià A. Bota, Miquel Roca, Eugeni Isern, Eugenio García-Moreno

CoRR, 2021

2012

A Reconfiguration Method to Improve the Yield of Bandwidth-Limited Pipelined ADCs.

David Camarero, Manal Lagziri, Kay Suenaga, Rodrigo Picos, Eugeni García-Moreno

Int. J. Meas. Technol. Instrum. Eng., 2012

Multi-subject Project Based Learning initiative.

Bartomeu Alorda, Jaume Verd, Vincent Canals, Kay Suenaga, V. Martinez

Proceedings of the IEEE Global Engineering Education Conference, 2012

2011

Design and evaluation of a microprocessor course combining three cooperative methods: SDLA, PjBL and CnBL.

Bartomeu Alorda, Kay Suenaga, Pere Pons

Comput. Educ., 2011

2010

Application of Predictive Oscillation-Based Test to a CMOS OpAmp.

Kay Suenaga, Eugeni Isern, Rodrigo Picos, Sebastià A. Bota, Miquel Roca, Eugeni García-Moreno

IEEE Trans. Instrum. Meas., 2010

2009

Predictive test strategy for CMOS RF mixers.

Eugenio García-Moreno, Kay Suenaga, Rodrigo Picos, Sebastià A. Bota, Miquel Roca, Eugeni Isern

Integr., 2009

Predictive Test Technique for Diagnosis of RF CMOS Receivers.

Kay Suenaga, Sebastià A. Bota, Rodrigo Picos, Eugeni Isern, Miquel Roca, Eugenio García-Moreno

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

2007

A Module for BiST of CMOS RF Receivers.

Kay Suenaga, Rodrigo Picos, Sebastià A. Bota, Miquel Roca, Eugeni Isern, Eugenio García

J. Electron. Test., 2007