Kaushik Bhattacharyya

According to our database1, Kaushik Bhattacharyya authored at least 9 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
A 24/48V to 0.8V-1.2V All-Digital Synchronous Buck Converter with Package-Integrated GaN power FETs and 180nm Silicon Controller IC.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

2014
An approach to design and implementation of on-chip clock generator for the switched capacitor based embedded DC-DC converter.
Comput. Electr. Eng., 2014

2012
Improvement of Performance of Dynamically Reconfigurable Switched Capacitor Based Non-Overlap Rotational Time Interleaved Embedded DC-DC Converter.
J. Low Power Electron., 2012

Improvement of Power Efficiency and output voltage Ripple of Embedded DC-DC converters with Three Step Down ratios.
J. Circuits Syst. Comput., 2012

2011
A dynamically reconfigurable NRTI switched-capacitor-based hybrid DC-DC converter suitable for embedded applications.
Microelectron. J., 2011

Technique for the reduction of output voltage ripple of switched capacitor-based DC??DC converters.
IET Circuits Devices Syst., 2011

2010
Architectural design and FPGA implementation of radix-4 CORDIC processor.
Microprocess. Microsystems, 2010

2009
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination.
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009

2008
A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008


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