Katsumasa Watanabe

According to our database, Katsumasa Watanabe authored at least 16 papers between 1987 and 2007.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2007

Robust Quantum Algorithms Computing OR with epsilon-Biased Oracles.

Tomoya Suzuki, Shigeru Yamashita, Masaki Nakanishi, Katsumasa Watanabe

IEICE Trans. Inf. Syst., 2007

2006

An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs.

Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Kazuo Nakajima, Katsumasa Watanabe

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Robust Quantum Algorithms with <i>epsilon</i>-Biased Oracles.

Tomoya Suzuki, Shigeru Yamashita, Masaki Nakanishi, Katsumasa Watanabe

Proceedings of the Computing and Combinatorics, 12th Annual International Conference, 2006

A New Approach to Online FPGA Placement.

Mitsuru Tomono, Masaki Nakanishi, Shigeru Yamashita, Kazuo Nakajima, Katsumasa Watanabe

Proceedings of the 40th Annual Conference on Information Sciences and Systems, 2006

2005

Reconfigurable 1-Bit Processor Array with Reduced Wirng Area.

Nobuo Nakai, Masaki Nakanishi, Shigeru Yamashita, Katsumasa Watanabe

Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005

Event-oriented computing with reconfigurable platform.

Mitsuru Tomono, Masaki Nakanishi, Katsumasa Watanabe, Shigeru Yamashita

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2003

Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis.

Nobuhiro Doi, Takashi Horiyama, Masaki Nakanishi, Shinji Kimura, Katsumasa Watanabe

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003

2002

Look Up Table Compaction Based on Folding of Logic Functions.

Shinji Kimura, Atsushi Ishii, Takashi Horiyama, Masaki Nakanishi, Hirotsugu Kajihara, Katsumasa Watanabe

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2001

Speech recognition chip for monosyllables.

Kazuhiro Nakamura, Qiang Zhu, Shinji Maruoka, Takashi Horiyama, Shinji Kimura, Katsumasa Watanabe

Proceedings of ASP-DAC 2001, 2001

A real-time 64-monosyllable recognition LSI with learning mechanism.

Kazuhiro Nakamura, Qiang Zhu, Shinji Maruoka, Takashi Horiyama, Shinji Kimura, Katsumasa Watanabe

Proceedings of ASP-DAC 2001, 2001

2000

Multi-clock path analysis using propositional satisfiability.

Kazuhiro Nakamura, Shinji Maruoka, Shinji Kimura, Katsumasa Watanabe

Proceedings of ASP-DAC 2000, 2000

An application specific Java processor with reconfigurabilities.

Shinji Kimura, Hiroyuki Kida, Kazuyoshi Takagi, Tatsumori Abematsu, Katsumasa Watanabe

Proceedings of ASP-DAC 2000, 2000

1998

Waiting false path analysis of sequential logic circuits for performance optimization.

Kazuhiro Nakamura, Kazuyoshi Takagi, Shinji Kimura, Katsumasa Watanabe

Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

1997

A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor.

Shinji Kimura, Yasufumi Itou, Makoto Hirao, Katsumasa Watanabe, Mitsuteru Yukishita, Akira Nagoya

Proceedings of the Fifth International Workshop on Hardware/Software Codesign, 1997

1988

Structured FORTRAN Preprocessors Generating Optimized Output.

Tatsuo Tsuji, Katsumasa Watanabe, Athushi Ikehata

Softw. Pract. Exp., 1988

1987

A method of constructing large-scale program processor for 8-bit system utilizing memory mapping feature.

Tatsuo Tsuji, Kazuto Kontani, Katsumasa Watanabe, Mitsuaki Sumiya

Syst. Comput. Jpn., 1987