Katsuki Tateyama

According to our database, Katsuki Tateyama authored at least 2 papers between 2020 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

A CT 2-2 MASH ΔΣ ADC With Multi-Rate LMS-Based Background Calibration and Input-Insensitive Quantization-Error Extraction.

Mitsuya Fukazawa, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Atsushi Ochi, Alsubaie Raed, Tetsuo Matsui

IEEE J. Solid State Circuits, 2021

2020

9.7 Background Multi-Rate LMS Calibration Circuit for 15MHz-BW 74dB-DR CT 2-2 MASH ΔΣ ADC in 28nm CMOS.

Mitsuya Fukazawa, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Alsubaie Raed, Masao Ito, Tetsuya Matsumoto, Tetsuo Matsui

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020