Katsuhisa Yamanaka

According to our database, Katsuhisa Yamanaka authored at least 55 papers between 2006 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of two.

2024

Enumerating floorplans with walls.

Katsuhisa Yamanaka, Shin-Ichi Nakano

Discret. Appl. Math., January, 2024

New Bounds for Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits.

Takashi Hirayama, Rin Suzuki, Katsuhisa Yamanaka, Yasuaki Nishitani

IEICE Trans. Inf. Syst., 2024

An Improved Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits.

Takashi Hirayama, Ryo Endo, Katsuhisa Yamanaka

Proceedings of the 54th IEEE International Symposium on Multiple-Valued Logic, 2024

2023

Sorting balls and water: Equivalence and computational complexity.

Takehiro Ito, Jun Kawahara, Shin-ichi Minato, Yota Otachi, Toshiki Saitoh, Akira Suzuki, Ryuhei Uehara, Takeaki Uno, Katsuhisa Yamanaka, Ryo Yoshinaka

Theor. Comput. Sci., November, 2023

Enumerating Empty and Surrounding Polygons.

Shunta Terui, Katsuhisa Yamanaka, Takashi Hirayama, Takashi Horiyama, Kazuhiro Kurita, Takeaki Uno

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., September, 2023

Reconfiguration and Enumeration of Optimal Cyclic Ladder Lotteries.

Yuta Nozaki, Kunihiro Wasa, Katsuhisa Yamanaka

Proceedings of the Combinatorial Algorithms - 34th International Workshop, 2023

Quick Computation of the Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits.

Takashi Hirayama, Rin Suzuki, Katsuhisa Yamanaka, Yasuaki Nishitani

Proceedings of the 53rd IEEE International Symposium on Multiple-Valued Logic, 2023

2022

An <i>O</i>(<i>n</i>²)-Time Algorithm for Computing a Max-Min 3-Dispersion on a Point Set in Convex Position.

Yasuaki Kobayashi, Shin-Ichi Nakano, Kei Uchizawa, Takeaki Uno, Yutaro Yamaguchi, Katsuhisa Yamanaka

IEICE Trans. Inf. Syst., 2022

A Polynomial Delay Algorithm for Enumerating 2-Edge-Connected Induced Subgraphs.

Taishu Ito, Yusuke Sano, Katsuhisa Yamanaka, Takashi Hirayama

IEICE Trans. Inf. Syst., 2022

Efficient segment folding is hard.

Takashi Horiyama, Fabian Klute, Matias Korman, Irene Parada, Ryuhei Uehara, Katsuhisa Yamanaka

Comput. Geom., 2022

2021

Optimal reconfiguration of optimal ladder lotteries.

Katsuhisa Yamanaka, Takashi Horiyama, Kunihiro Wasa

Theor. Comput. Sci., 2021

Algorithmic enumeration of surrounding polygons.

Katsuhisa Yamanaka, David Avis, Takashi Horiyama, Yoshio Okamoto, Ryuhei Uehara, Tanami Yamauchi

Discret. Appl. Math., 2021

2020

Parameterized complexity of independent set reconfiguration problems.

Takehiro Ito, Marcin Jakub Kaminski, Hirotaka Ono, Akira Suzuki, Ryuhei Uehara, Katsuhisa Yamanaka

Discret. Appl. Math., 2020

Compiling Crossing-free Geometric Graphs with Connectivity Constraint for Fast Enumeration, Random Sampling, and Optimization.

Yu Nakahata, Takashi Horiyama, Shin-ichi Minato, Katsuhisa Yamanaka

CoRR, 2020

Floorplans with Walls.

Katsuhisa Yamanaka, Shin-Ichi Nakano

Proceedings of the Theory and Applications of Models of Computation, 2020

A Polynomial Delay Algorithm for Enumerating 2-Edge-Connected Induced Subgraphs.

Yusuke Sano, Katsuhisa Yamanaka, Takashi Hirayama

Proceedings of the Frontiers in Algorithmics - 14th International Workshop, 2020

2019

Sequentially Swapping Colored Tokens on Graphs.

Katsuhisa Yamanaka, Erik D. Demaine, Takashi Horiyama, Akitoshi Kawamura, Shin-Ichi Nakano, Yoshio Okamoto, Toshiki Saitoh, Akira Suzuki, Ryuhei Uehara, Takeaki Uno

J. Graph Algorithms Appl., 2019

Enumerating Highly-Edge-Connected Spanning Subgraphs.

Katsuhisa Yamanaka, Yasuko Matsui, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019

Exact Exponential Algorithm for Distance-3 Independent Set Problem.

Katsuhisa Yamanaka, Shogo Kawaragi, Takashi Hirayama

IEICE Trans. Inf. Syst., 2019

The Complexity of Induced Tree Reconfiguration Problems.

Kunihiro Wasa, Katsuhisa Yamanaka, Hiroki Arimura

IEICE Trans. Inf. Syst., 2019

Ecient Segment Folding is Hard.

Takashi Horiyama, Fabian Klute, Matias Korman, Irene Parada, Ryuhei Uehara, Katsuhisa Yamanaka

Proceedings of the 31st Canadian Conference on Computational Geometry, 2019

2018

Swapping colored tokens on graphs.

Katsuhisa Yamanaka, Takashi Horiyama, J. Mark Keil, David G. Kirkpatrick, Yota Otachi, Toshiki Saitoh, Ryuhei Uehara, Yushi Uno

Theor. Comput. Sci., 2018

Enumerating Floorplans with Columns.

Katsuhisa Yamanaka, Md. Saidur Rahman, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

Function Design for Minimum Multiple-Control Toffoli Circuits of Reversible Adder/Subtractor Blocks and Arithmetic Logic Units.

Md Belayet Ali, Takashi Hirayama, Katsuhisa Yamanaka, Yasuaki Nishitani

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018

More Routes for Evacuation.

Katsuhisa Yamanaka, Yasuko Matsui, Shin-Ichi Nakano

Proceedings of the Computing and Combinatorics - 24th International Conference, 2018

Ladder-Lottery Realization.

Katsuhisa Yamanaka, Takashi Horiyama, Takeaki Uno, Kunihiro Wasa

Proceedings of the 30th Canadian Conference on Computational Geometry, 2018

2017

Enumeration, Counting, and Random Generation of Ladder Lotteries.

Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Inf. Syst., 2017

Floorplans with Columns.

Katsuhisa Yamanaka, Md. Saidur Rahman, Shin-Ichi Nakano

Proceedings of the Combinatorial Optimization and Applications, 2017

2016

Permutation Enumeration.

Katsuhisa Yamanaka

Encyclopedia of Algorithms, 2016

Uniformly Random Generation of Floorplans.

Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Inf. Syst., 2016

New Two-Qubit Gate Library with Entanglement.

Md Belayet Ali, Takashi Hirayama, Katsuhisa Yamanaka, Yasuaki Nishitani

Proceedings of the 46th IEEE International Symposium on Multiple-Valued Logic, 2016

2015

Swapping labeled tokens on graphs.

Katsuhisa Yamanaka, Erik D. Demaine, Takehiro Ito, Jun Kawahara, Masashi Kiyomi, Yoshio Okamoto, Toshiki Saitoh, Akira Suzuki, Kei Uchizawa, Takeaki Uno

Theor. Comput. Sci., 2015

Another Optimal Binary Representation of Mosaic Floorplans.

Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2015

Swapping Colored Tokens on Graphs.

Katsuhisa Yamanaka, Takashi Horiyama, David G. Kirkpatrick, Yota Otachi, Toshiki Saitoh, Ryuhei Uehara, Yushi Uno

Proceedings of the Algorithms and Data Structures - 14th International Symposium, 2015

Competitive Diffusion on Weighted Graphs.

Takehiro Ito, Yota Otachi, Toshiki Saitoh, Hisayuki Satoh, Akira Suzuki, Kei Uchizawa, Ryuhei Uehara, Katsuhisa Yamanaka, Xiao Zhou

Proceedings of the Algorithms and Data Structures - 14th International Symposium, 2015

2014

Efficient Enumeration of All Ladder Lotteries with <i>k</i> Bars.

Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014

A Lower Bound on the Gate Count of Toffoli-Based Reversible Logic Circuits.

Takashi Hirayama, Hayato Sugawara, Katsuhisa Yamanaka, Yasuaki Nishitani

IEICE Trans. Inf. Syst., 2014

Approximating the path-distance-width for AT-free graphs and graphs in related classes.

Yota Otachi, Toshiki Saitoh, Katsuhisa Yamanaka, Shuji Kijima, Yoshio Okamoto, Hirotaka Ono, Yushi Uno, Koichi Yamazaki

Discret. Appl. Math., 2014

Computational Complexity of Competitive Diffusion on (Un)weighted Graphs.

Takehiro Ito, Yota Otachi, Toshiki Saitoh, Hisayuki Satoh, Akira Suzuki, Kei Uchizawa, Ryuhei Uehara, Katsuhisa Yamanaka, Xiao Zhou

CoRR, 2014

On the Parameterized Complexity for Token Jumping on Graphs.

Takehiro Ito, Marcin Kaminski, Hirotaka Ono, Akira Suzuki, Ryuhei Uehara, Katsuhisa Yamanaka

Proceedings of the Theory and Applications of Models of Computation, 2014

2013

A Compact Encoding of Rectangular Drawings with Edge Lengths.

Shin-Ichi Nakano, Katsuhisa Yamanaka

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013

2012

Efficient enumeration of ordered trees with k leaves.

Katsuhisa Yamanaka, Yota Otachi, Shin-Ichi Nakano

Theor. Comput. Sci., 2012

Random generation and enumeration of bipartite permutation graphs.

Toshiki Saitoh, Yota Otachi, Katsuhisa Yamanaka, Ryuhei Uehara

J. Discrete Algorithms, 2012

Enumerating All Rooted Trees Including <i>k</i> Leaves.

Masanobu Ishikawa, Katsuhisa Yamanaka, Yota Otachi, Shin-Ichi Nakano

IEICE Trans. Inf. Syst., 2012

2011

Approximability of the Path-Distance-Width for AT-free Graphs.

Yota Otachi, Toshiki Saitoh, Katsuhisa Yamanaka, Shuji Kijima, Yoshio Okamoto, Hirotaka Ono, Yushi Uno, Koichi Yamazaki

Proceedings of the Graph-Theoretic Concepts in Computer Science, 2011

2010

Efficient enumeration of all ladder lotteries and its application.

Katsuhisa Yamanaka, Shin-Ichi Nakano, Yasuko Matsui, Ryuhei Uehara, Kento Nakada

Theor. Comput. Sci., 2010

A compact encoding of plane triangulations with efficient query supports.

Katsuhisa Yamanaka, Shin-Ichi Nakano

Inf. Process. Lett., 2010

Random Generation and Enumeration of Proper Interval Graphs.

Toshiki Saitoh, Katsuhisa Yamanaka, Masashi Kiyomi, Ryuhei Uehara

IEICE Trans. Inf. Syst., 2010

2009

Listing All Plane Graphs.

Katsuhisa Yamanaka, Shin-Ichi Nakano

J. Graph Algorithms Appl., 2009

Computational Complexities of University Interview Timetabling.

Naoyuki Kamiyama, Yuuki Kiyonari, Eiji Miyano, Shuichi Miyazaki, Katsuhisa Yamanaka

IEICE Trans. Inf. Syst., 2009

Efficient Enumeration of Ordered Trees with kLeaves (Extended Abstract).

Katsuhisa Yamanaka, Yota Otachi, Shin-Ichi Nakano

Proceedings of the WALCOM: Algorithms and Computation, Third International Workshop, 2009

2008

A Compact Encoding of Rectangular Drawings with Efficient Query Supports.

Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

2007

Constant Time Generation of Integer Partitions.

Katsuhisa Yamanaka, Shin-ichiro Kawano, Yosuke Kikuchi, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006

Constant Time Generation of Rectangular Drawings with Exactly <i>n</i> Faces.

Satoshi Yoshii, Daisuke Chigira, Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

Coding Floorplans with Fewer Bits.

Katsuhisa Yamanaka, Shin-Ichi Nakano

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006