Kashif Virk

According to our database1, Kashif Virk authored at least 8 papers between 2003 and 2008.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
System-Level Design Methodologies for Networked Multiprocessor Systems-on-Chip.
PhD thesis, 2008

2007
ARTS: A SystemC-based framework for multiprocessor Systems-on-Chip modelling.
Des. Autom. Embed. Syst., 2007

2005
ARTS: A System-Level Framework for Modeling MPSoC Components and Analysis of their Causality.
Proceedings of the 13th International Symposium on Modeling, 2005

System-level Modeling of Wireless Integrated Sensor Networks.
Proceedings of the 2005 International Symposium on System-on-Chip, 2005

Design of A Development Platform for HW/SW Codesign ofWireless Integrated Sensor Nodes.
Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

2004
A system-level multiprocessor system-on-chip modeling framework.
Proceedings of the 2004 International Symposium on System-on-Chip, 2004

2003
Network-on-Chip Modeling for System-Level Multiprocessor Simulation.
Proceedings of the 24th IEEE Real-Time Systems Symposium (RTSS 2003), 2003

Abstract RTOS modeling for multiprocessor system-on-chip.
Proceedings of the 2003 International Symposium on System-on-Chip, 2003


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