Karwan Javanmardi

According to our database1, Karwan Javanmardi authored at least 5 papers between 2022 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
Employing Parallelization Technique to Reduce Area and Power in a Booth Encoded Algorithm-Based Multiplier.
Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

Design of a DC Nano-Grid Based on DBS and Smart Variable Load Control Approaches.
Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

Utilizing Deep Learning Techniques to Eliminate the Current Sensor in a Boost Converter Used in a DC Nano-Grid.
Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

Improving Accuracy of the Current Mirrors for High-Resolution Applications.
Proceedings of the 31st International Conference on Mixed Design of Integrated Circuits and System , 2024

2022
Ultra Low-Power, Area-Efficient Multiplier Based on Shift-and-Add Architecture.
Proceedings of the 29th International Conference on Mixed Design of Integrated Circuits and System, 2022


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