Karthik Swaminathan

Orcid: 0009-0002-2602-4249

According to our database1, Karthik Swaminathan authored at least 51 papers between 1998 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Towards Generalized On-Chip Communication for Programmable Accelerators in Heterogeneous Architectures.
CoRR, 2024

Anticipate & Collab: Data-driven Task Anticipation and Knowledge-driven Planning for Human-robot Collaboration.
CoRR, 2024

Dramaton: A Near-DRAM Accelerator for Large Number Theoretic Transforms.
IEEE Comput. Archit. Lett., 2024

A 400-ns-Settling- Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits 2024, 2024

Acti-V-Link: An Active Surface, Visual Feedback Based, Mechanically Underactuated Gripper for In-Hand Manipulation.
Proceedings of the 2024 4th International Conference on Robotics and Control Engineering, 2024


BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs.
Proceedings of the 51st ACM/IEEE Annual International Symposium on Computer Architecture, 2024

Anticipate & Act: Integrating LLMs and Classical Planning for Efficient Task Execution in Household Environments<sup>†</sup>.
Proceedings of the IEEE International Conference on Robotics and Automation, 2024

FitBit: Ensuring Robust and Secure Execution Through Runtime-Generated Stressmarks.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2024

MulBERRY: Enabling Bit-Error Robustness for Energy-Efficient Multi-Agent Autonomous Systems.
Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2024

2023
Characterization and Exploration of Latch Checkers for Efficient RAS Protection.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023

BERRY: Bit Error Robustness for Energy-Efficient Reinforcement Learning-Based Autonomous Systems.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
Analyzing and Improving Resilience and Robustness of Autonomous Systems.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A Scalable Methodology for Agile Chip Development with Open-Source Hardware Components.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

A 12nm Agile-Designed SoC for Swarm-Based Perception with Heterogeneous IP Blocks, a Reconfigurable Memory Hierarchy, and an 800MHz Multi-Plane NoC.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022

MBET: Resilience Improvement Method for DNNs.
Proceedings of the IEEE International Conference On Artificial Intelligence Testing, 2022

2021
Hardware Specialization: From Cell to Heterogeneous Microprocessors Everywhere.
IEEE Micro, 2021

Intel Wins in Four Decades, but AMD Catches Up.
IEEE Micro, 2021


Crossbar based Processing in Memory Accelerator Architecture for Graph Convolutional Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

SERMiner : A Framework for Early-stage Reliability Estimation for IBM Processors.
Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021

2020
Guest Editorial: IEEE TC Special Issue on Domain-Specific Architectures for Emerging Applications.
IEEE Trans. Computers, 2020

GaaS-X: Graph Analytics Accelerator Supporting Sparse Data Representation using Crossbar Architectures.
Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019
Resilient Low Voltage Accelerators for High Energy Efficiency.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

Generation of Stressmarks for Early Stage Soft-Error Modeling.
Proceedings of the 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2019

2018
Impact of Software Approximations on the Resiliency of a Video Summarization System.
Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2018

Cascaded and resonant SRAM supply boosting for ultra-low voltage cognitive IoT applications.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2017
Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems.
ACM Trans. Embed. Comput. Syst., 2017


BRAVO: Balanced Reliability-Aware Voltage Optimization.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

2016
Nonvolatile Processor Architectures: Efficient, Reliable Progress with Unstable Power.
IEEE Micro, 2016

10.3 An analog front-end for 100BASE-T1 automotive Ethernet in 28nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Resilience characterization of a vision analytics application under varying degrees of approximation.
Proceedings of the 2016 IEEE International Symposium on Workload Characterization, 2016

2015
Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures.
Proceedings of the 28th International Conference on VLSI Design, 2015

Resilient mobile cognition: Algorithms, innovations, and architectures.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Resilient, UAV-embedded real-time computing.
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

Architecture exploration for ambient energy harvesting nonvolatile processors.
Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

2014
Understanding the landscape of accelerators for vision.
Proceedings of the 2014 IEEE Workshop on Signal Processing Systems, 2014

An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs.
Proceedings of the ACM/IEEE 41st International Symposium on Computer Architecture, 2014

Refresh Enabled Video Analytics (REVA): Implications on power and performance of DRAM supported embedded visual systems.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Modeling steep slope devices: From circuits to architectures.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Steep Slope Devices: Enabling New Architectural Paradigms.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014

2013
Steep-Slope Devices: From Dark to Dim Silicon.
IEEE Micro, 2013

2012
Design space exploration of workload-specific last-level caches.
Proceedings of the International Symposium on Low Power Electronics and Design, 2012

Performance enhancement under power constraints using heterogeneous CMOS-TFET multicores.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012

When to forget: A system-level perspective on STT-RAMs.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011
Towards Resilient Micro-architectures: Datapath Reliability Enhancement Using STT-MRAM.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Improving energy efficiency of multi-threaded applications using heterogeneous CMOS-TFET multicores.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

Enabling architectural innovations using non-volatile memory.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

2009
Performance optimizations for distributed real-time text indexing.
Proceedings of the 16th International Conference on High Performance Computing, 2009

1998
Large Scale Active Networks Simulation.
Proceedings of the Applied Parallel Computing, 1998


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