Karsten Rönner

According to our database, Karsten Rönner authored at least 6 papers between 1993 and 1996.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1996

Architecture and applications of the HiPAR video signal processor.

Karsten Rönner, Johannes Kneip

IEEE Trans. Circuits Syst. Video Technol., 1996

1995

Eine für Bildverarbeitungsverfahren optimierte hochparallele RISC-Architektur.

Karsten Rönner

PhD thesis, 1995

Architecture and C++-programming environment of a highly parallel image signal processor.

Johannes Kneip, Martin Ohmacht, Karsten Rönner, Peter Pirsch

Microprocess. Microprogramming, 1995

Parallelization Resources of Image Processing Algorithms and Their Mapping on a Programmable Parallel Videosignal Processor.

Peter Pirsch, Johannes Kneip, Karsten Rönner

Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994

A data path array with shared memory as core of a high performance DSP.

Johannes Kneip, Karsten Rönner, Peter Pirsch

Proceedings of the International Conference on Application Specific Array Processors, 1994

1993

A defect-tolerant systolic array implementation for real time image processing.

V. Hecht, Karsten Rönner, Peter Pirsch

J. VLSI Signal Process., 1993