Karl Goser

According to our database1, Karl Goser authored at least 44 papers between 1966 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2005
Effects of inhomogeneous negative bias temperature stress on p-channel MOSFETs of analog and RF circuits.
Microelectron. Reliab., 2005

2003
Circuit and application aspects of tunnelling devices in a MOBILE configuration.
Int. J. Circuit Theory Appl., 2003

2002
Asynchronous Circuit Design Based on the RTBT Monostable-Bistable Logic Transition Element (MOBILE).
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002

Experimental threshold logic implementations based on resonant tunnelling diodes.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002

Evolutionary Training of Neuro-fuzzy Patches for Function Approximation.
Proceedings of the Artificial Neural Networks, 2002

2001
Tunnelling Diode Technology.
Proceedings of the 31st IEEE International Symposium on Multiple-Valued Logic, 2001

Threshold-gates in arithmetic circuits.
Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Multideme Evolution algorithm Based Approach to the Generation of Fuzzy Systems.
Proceedings of the 10th IEEE International Conference on Fuzzy Systems, 2001

A New Sequential Learning Algorithm Using Pseudo-gaussian Functions for Neuro-fuzzy Systems.
Proceedings of the 10th IEEE International Conference on Fuzzy Systems, 2001

2000
Threshold logic circuit design of parallel adders using resonant tunneling devices.
IEEE Trans. Very Large Scale Integr. Syst., 2000

Manufacturability and robust design of nanoelectronic logic circuits based on resonant tunnelling diodes.
Int. J. Circuit Theory Appl., 2000

Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

1999
A low-power and high-performance CMOS fingerprint sensing and encoding architecture.
IEEE J. Solid State Circuits, 1999

Dynamic Hebbian learning strategies for VLSI-systems.
Neurocomputing, 1999

Resonant Tunneling Transistors for Threshold Logic Circuit Applications.
Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

Parameter Determination for Nano-Scale Modelling.
Proceedings of the Computational Intelligence, 1999

1998
Implementation of a RBF Network Based on Possibilistic Reasoning.
Proceedings of the 24th EUROMICRO '98 Conference, 1998

1997
Aspects of systems and circuits for nanoelectronics.
Proc. IEEE, 1997

Possibilistic reasoning in a computational neural network.
Proceedings of International Conference on Neural Networks (ICNN'97), 1997

Short- and Long-Term Dynamics in a Stochastic Pulse Stream Neuron Implemented in FPGA.
Proceedings of the Artificial Neural Networks, 1997

Hebbian Multilayer Network in a Wheelchair Robot.
Proceedings of the Artificial Neural Networks, 1997

Rare Fault Detection by Possibilistic Reasoning.
Proceedings of the Computational Intelligence, 1997

1996
Exponential Hebbian On-Line Learning Implemented in FPGAs.
Proceedings of the Artificial Neural Networks, 1996

Robot Learning in Analog Neural Hardware.
Proceedings of the Artificial Neural Networks, 1996

1995
A Fractal Selforganizing Map with Partially Chaotic Neurons.
Proceedings of the From Natural to Artificial Neural Computation, 1995

Dynamic Learning of Radial Basis Functions for Fuzzy Clustering.
Proceedings of the From Natural to Artificial Neural Computation, 1995

1994
Nochmals ein genetischer Algorithmus zum Optimieren von regelbasierten Fuzzy-Systemen?
Proceedings of the Fuzzy Logik, 1994

Self-organizing maps based on differential equations.
Proceedings of the 2nd European Symposium on Artificial Neural Networks, 1994

1993
Hardware Design for Self-Organizing Feature Maps with Binary Input Vectors.
Proceedings of the New Trends in Neural Computation, 1993

Three algorithms for searching the minimum distance in the self-organizing maps.
Proceedings of the 1st European Symposium on Artificial Neural Networks, 1993

1992
Mikroelektronische Realisierung von künstlichen neuronalen Netzen / Microelectronic Realizations of artificial neural networks.
it Inf. Technol., 1992

Optimized Fuzzy Controller Architecture for Field Programmable Gate Arrays.
Proceedings of the Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping, Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31, 1992

1991
A Modified Algorithm for Self-Organizing Maps Based on the Schrödinger Equation.
Proceedings of the Artificial Neural Networks, 1991

Application and Implementation of Neural Networks in Microelectronics.
Proceedings of the Artificial Neural Networks, 1991

1990
A Local Timing Model for Parallel Optimization with Boltzmann Machines.
Proceedings of the Parallel Problem Solving from Nature, 1st Workshop, 1990

1989
VLSI technologies for artificial neural networks.
IEEE Micro, 1989

Selbstorganisierende Parameterkarten zur Prozeßüberwachung und -voraussage.
Proceedings of the Wissensbasierte Systeme, 1989

Basic VLSI Circuits for Neural Networks.
Proceedings of the Neurocomputing - Algorithms, Architectures and Applications, Proceedings of the NATO Advanced Research Workshop on Neurocomputing Algorithms, Architectures and Applications, Les Arcs, France, February 27, 1989

Evaluation and Comparison of Selected WSI Reconfiguration Architectures in Terms of Yield and Yield per Area.
Proceedings of the Fehlertolerierende Rechensysteme / Fault-Tolerant Computing Systems, 1989

1987
An expert system shell for standardization of VLSI process data base and knowledge base.
Microprocess. Microprogramming, 1987

1986
Adaptive Associate Systems for VLSI.
Proceedings of the WOPPLOT 86, 1986

1984
Intelligent memories in VLSI.
Inf. Sci., 1984

1967
Ein wortorganisierter supraleitender Schichtspeicher.
Elektron. Rechenanlagen, 1967

1966
Supraleitende Schalt- und Speicherelemente.
Elektron. Rechenanlagen, 1966


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