Karim M. A. Ali

Orcid: 0000-0002-4700-7328

According to our database1, Karim M. A. Ali authored at least 10 papers between 2014 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2020
An FPGA comparative study of high-level and low-level combined designs for HEVC intra, inverse quantization, and IDCT/IDST 2D modules.
Int. J. Circuit Theory Appl., 2020

Cross-layer CNN Approximations for Hardware Implementation.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019
Case study of an HEVC decoder application using high-level synthesis: intraprediction, dequantization, and inverse transform blocks.
J. Electronic Imaging, 2019

ViPar: High-Level Design Space Exploration for Parallel Video Processing Architectures.
Int. J. Reconfigurable Comput., 2019

2018
An Embedded Multi-Sensor Data Fusion Design for Vehicle Perception Tasks.
J. Commun., 2018

2017
An Efficient Hardware Implementation of TimSort and MergeSort Algorithms Using High Level Synthesis.
Proceedings of the 2017 International Conference on High Performance Computing & Simulation, 2017

FPGA-Centric High Performance Embedded Computing: Challenges and Trends.
Proceedings of the Euromicro Conference on Digital System Design, 2017

Exploring HLS Optimizations for Efficient Stereo Matching Hardware Implementation.
Proceedings of the Applied Reconfigurable Computing - 13th International Symposium, 2017

2015
Using hardware parallelism for reducing power consumption in video streaming applications.
Proceedings of the 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2015

2014
A generic pixel distribution architecture for parallel video processing.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014


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