Kanyu Cao
According to our database1,
Kanyu Cao
authored at least 10 papers
between 2019 and 2024.
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Bibliography
2024
Sub-20-nm DRAM Technology under Negative Bias Temperature Instability (NBTI): from Characterization to Physical Origin Identification.
Proceedings of the IEEE International Reliability Physics Symposium, 2024
2023
Double-sided Row Hammer Effect in Sub-20 nm DRAM: Physical Mechanism, Key Features and Mitigation.
Proceedings of the IEEE International Reliability Physics Symposium, 2023
Dielectric Relaxation Performance of DRAM Storage Capacitors and Ways of Improvement.
Proceedings of the IEEE International Memory Workshop, 2023
2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Adaptive DLL Update Scheme for Power Fluctuation Immunity Using Phase Error Detector.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
A 2-stage with 3-stack 1-tap DFE Sense Amplifier based on Dual Reference for High Speed & Low Power DRAM Interface.
Proceedings of the 14th IEEE International Conference on ASIC, 2021
Proceedings of the 14th IEEE International Conference on ASIC, 2021
2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019
Proceedings of the 13th IEEE International Conference on ASIC, 2019