Kanwen Wang

According to our database, Kanwen Wang authored at least 11 papers between 2011 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Impact of Bottom Electrode Roughness on the Analog Switching Characteristics in Nanoscale RRAM Array.

Wenbin Zhang, Jianshi Tang, Bin Gao, Wen Sun, Wei Liu, Kanwen Wang, Wei Wu, He Qian, Huaqiang Wu

Proceedings of the Device Research Conference, 2021

2017

An energy-efficient and high-throughput bitwise CNN on sneak-path-free digital ReRAM crossbar.

Leibin Ni, Zichuan Liu, Wenhao Song, J. Joshua Yang, Hao Yu, Kanwen Wang, Yuangang Wang

Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

2015

3D Many-Core Microprocessor Power Management by Space-Time Multiplexing Based Demand-Supply Matching.

Sai Manoj P. D., Hao Yu, Kanwen Wang

IEEE Trans. Computers, 2015

A 2.5-D Memory-Logic Integration With Data-Pattern-Aware Memory Controller.

Dongjun Xu, Sai Manoj P. D., Kanwen Wang, Hao Yu, Ningmei Yu, Mingbin Yu

IEEE Des. Test, 2015

Smart I/Os: a data-pattern aware 2.5D interconnect with space-time multiplexing.

Sai Manoj P. D., Kanwen Wang, Hantao Huang, Hao Yu

Proceedings of the 2015 ACM/IEEE International Workshop on System Level Interconnect Prediction, 2015

2014

A thermal resilient integration of many-core microprocessors and main memory by 2.5D TSI I/Os.

Sih-Sian Wu, Kanwen Wang, Sai Manoj Pudukotai Dinakarrao, Tsung-Yi Ho, Mingbin Yu, Hao Yu

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

3D reconfigurable power switch network for demand-supply matching between multi-output power converters and many-core microprocessors.

Kanwen Wang, Hao Yu, Benfei Wang, Chun Zhang

Proceedings of the Design, Automation and Test in Europe, 2013

Peak power reduction and workload balancing by space-time multiplexing based demand-supply matching for 3D thousand-core microprocessor.

Sai Manoj Pudukotai Dinakarrao, Kanwen Wang, Hao Yu

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2011

A Reconfigurable Multi-Transform VLSI Architecture Supporting Video Codec Design.

Kanwen Wang, Jialin Chen, Wei Cao, Ying Wang, Lingli Wang, Jiarong Tong

IEEE Trans. Circuits Syst. II Express Briefs, 2011

A coarse-grained reconfigurable computing unit.

Kanwen Wang, Shuai Chen, Wei Cao, Lingli Wang, Jiarong Tong

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

A permutation network for configurable and scalable FFT processors.

Shuai Chen, Jialin Chen, Kanwen Wang, Wei Cao, Lingli Wang

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011