Kanwar Jit Singh

According to our database, Kanwar Jit Singh authored at least 9 papers between 1988 and 2000.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2000

A single-chip, 1.6-billion, 16-b MAC/s multiprocessor DSP.

Bryan D. Ackland, A. Anesko, D. Brinthaupt, S. J. Daubert, Asawaree Kalavade, J. Knobloch, E. Micca, M. Moturi, Chris J. Nicol, Jay H. O'Neill, Joe Othmer, Eduard Sackinger, Kanwar Jit Singh, J. Sweet, C. J. Terman, Joseph Williams

IEEE J. Solid State Circuits, 2000

1999

Software Environment for a Multiprocessor DSP.

Asawaree Kalavade, Joe Othmer, Bryan D. Ackland, Kanwar Jit Singh

Proceedings of the 36th Conference on Design Automation, 1999

1998

A 200-mW, 3.3-V, CMOS color camera IC producing 352×288 24-b video at 30 frames/s.

Marc J. Loinaz, Kanwar Jit Singh, Andrew J. Blanksby, David A. Inglis, Kamran Azadet, Bryan D. Ackland

IEEE J. Solid State Circuits, 1998

1993

Performance optimization of pipelined logic circuits using peripheral retiming and resynthesis.

Sharad Malik, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

1992

Sequential Circuit Design Using Synthesis and Optimization.

Ellen Sentovich, Kanwar Jit Singh, Cho W. Moon, Hamid Savoj, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

On the Temporal Equivalence of Sequential Circuits.

Narendra V. Shenoy, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the 29th Design Automation Conference, 1992

1990

Performance Optimization of Pipelined Circuits.

Sharad Malik, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

A Heuristic Algorithm for the Fanout Problem.

Kanwar Jit Singh, Alberto L. Sangiovanni-Vincentelli

Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1988

Timing optimization of combinational logic.

Kanwar Jit Singh, Albert R. Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli

Proceedings of the 1988 IEEE International Conference on Computer-Aided Design, 1988