Kanishka Lahiri
According to our database1,
Kanishka Lahiri
authored at least 41 papers
between 1999 and 2020.
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Bibliography
2020
Proceedings of the IEEE International Symposium on Workload Characterization, 2020
2019
Proceedings of the 2019 ACM/SPEC International Conference on Performance Engineering, 2019
2017
Fast IPC estimation for performance projections using proxy suites and decision trees.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017
2015
Characterizing Large Dataset GPU Compute Workloads Targeting Systems with Die-Stacked Memory.
Proceedings of the 22nd IEEE International Conference on High Performance Computing, 2015
2010
IEEE Trans. Very Large Scale Integr. Syst., 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
2008
IEEE Trans. Very Large Scale Integr. Syst., 2008
2007
Tutorial 5: SoC Communication Architectures: Technology, Current Practice, Research, and Trends.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 44th Design Automation Conference, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Integrated data relocation and bus reconfiguration for adaptive system-on-chip platforms.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the 43rd Design Automation Conference, 2006
2005
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Battery discharge characteristics of wireless sensor nodes: an experimental analysis.
Proceedings of the Second Annual IEEE Communications Society Conference on Sensor and Ad Hoc Communications and Networks, 2005
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005
FLEXBUS: a high-performance system-on-chip communication architecture with a dynamically configurable topology.
Proceedings of the 42nd Design Automation Conference, 2005
2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
Configurable Platforms With Dynamic Platform Management: An Efficient Alternative to Application-Specific System-on-Chips.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004
Proceedings of the 2nd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2004
2003
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003
2002
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Proceedings of the IEEE International Conference on Communications, 2002
Communication architecture based power management for battery efficient system design.
Proceedings of the 39th Design Automation Conference, 2002
Proceedings of the Tenth International Symposium on Hardware/Software Codesign, 2002
2001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs.
Proceedings of the 38th Design Automation Conference, 2001
2000
Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000
Communication architecture tuners: a methodology for the design of high-performance communication architectures for systems-on-chips.
Proceedings of the 37th Conference on Design Automation, 2000
1999
Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999