Kanika Monga

According to our database, Kanika Monga authored at least 5 papers between 2019 and 2022.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2022

Design of a Programmable Delay Line with On-Chip Calibration to Achieve Immunity Against Process Variations.

Kanika Monga, Eesha Karnawat, Nitin Chaturvedi, S. Gurunarayanan

Proceedings of the VLSI Design and Test - 26th International Symposium, 2022

2021

Design of an MTJ/CMOS-Based Asynchronous System for Ultra-Low Power Energy Autonomous Applications.

Kanika Monga, Kunal Harbhajanka, Arush Srivastava, Nitin Chaturvedi, S. Gurunarayanan

J. Circuits Syst. Comput., 2021

2020

Twin-Coupled Sense Amplifier to improve margin in 1T-1MTJ based MRAM array.

Kanika Monga, Lakshaya Maheshwari, Nitin Chaturvedi, S. Gurunarayanan

Proceedings of the 2020 24th International Symposium on VLSI Design and Test (VDAT), 2020

2019

A CMOS/MTJ Based Novel Non-volatile SRAM Cell with Asynchronous Write Termination for Normally OFF Applications.

Kanika Monga, Nitin Chaturvedi

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

A Novel Low Power Non-Volatile SRAM Cell with Self Write Termination.

Kanika Monga, Akul Malhotra, Nitin Chaturvedi, S. Gurunayaranan

Proceedings of the 10th International Conference on Computing, 2019