Kangwook Jo
Orcid: 0000-0002-5367-7475
According to our database1,
Kangwook Jo
authored at least 5 papers
between 2012 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
2012
2014
2016
2018
2020
2022
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
A High-Performance 1Tb 3b/Cell 3D-NAND Flash with a 194MB/s Write Throughput on over 300 Layers $\mathsf{i}$.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
2020
13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array Technique.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2017
Variation-Tolerant Sensing Circuit for Ultralow-Voltage Operation of Spin-Torque Transfer Magnetic RAM.
IEEE Trans. Circuits Syst. II Express Briefs, 2017
2016
Variation-tolerant and low power look-up table (LUT) using spin-torque transfer magnetic RAM for non-volatile field programmable gate array (FPGA).
Proceedings of the International SoC Design Conference, 2016
2012
Integration of dual channel timing formatter system for high speed memory test equipment.
Proceedings of the International SoC Design Conference, 2012