Kanchan Manna
Orcid: 0000-0002-2325-8093
According to our database1,
Kanchan Manna
authored at least 23 papers
between 2008 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
Congestion-Aware Vertical Link Placement and Application Mapping Onto 3-D Network-on-Chip Architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., August, 2024
2023
Integr., November, 2023
Application Mapping Onto Manycore Processor Architectures Using Active Search Framework.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023
2022
Integr., 2022
2019
ACM J. Emerg. Technol. Comput. Syst., 2019
J. Circuits Syst. Comput., 2019
2018
IEEE Trans. Computers, 2018
2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
Integrated Through-Silicon Via Placement and Application Mapping for 3D Mesh-Based NoC Design.
ACM Trans. Embed. Comput. Syst., 2016
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
Thermal-Aware Design and Test Techniques for Two-and Three-Dimensional Networks-on-Chip.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016
2015
J. Circuits Syst. Comput., 2015
Thermal-aware multifrequency network-on-chip testing using particle swarm optimisation.
Int. J. High Perform. Syst. Archit., 2015
TSV Placement and Core Mapping for 3D Mesh Based Network-on-Chip Design Using Extended Kernighan-Lin Partitioning.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015
2014
Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization.
IEEE Trans. Very Large Scale Integr. Syst., 2014
Extending Kernighan-Lin partitioning heuristic for application mapping onto Network-on-Chip.
J. Syst. Archit., 2014
Through silicon via placement and mapping strategy for 3D mesh based Network-on-Chip.
Proceedings of the 22nd International Conference on Very Large Scale Integration, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2013
Proceedings of the VLSI Design and Test, 17th International Symposium, 2013
2012
An efficient routing technique for mesh-of-tree-based NoC and its performance comparison.
Int. J. High Perform. Syst. Archit., 2012
2009
A Comparative Performance Evaluation of Network-on-Chip Architectures under Self-Similar Traffic.
Proceedings of the ARTCom 2009, 2009
2008
Proceedings of the IEEE Reglon 10 Colloquium and Third International Conference on Industrial and Information Systems, 2008
Proceedings of the IEEE Reglon 10 Colloquium and Third International Conference on Industrial and Information Systems, 2008