Kamal K. Varma

According to our database1, Kamal K. Varma authored at least 3 papers between 1993 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2006
FPGA implementation of a parallel EBCOT tier-1 encoder that preserves coding efficiency.
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

1995
Compiled Code, Dynamic Worst Case Timing Simulation Tracking Multiple Causality.
Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

1993
Generation of testable designs from behavioral descriptions using high level synthesis tools.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993


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