Kamal El-Sankary

Orcid: 0000-0001-8104-6913

According to our database1, Kamal El-Sankary authored at least 70 papers between 2002 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
Efficient Address-Embedded Time-Domain Implementation of Minima Finders for Soft Error-Correction Decoders.
IEEE Trans. Circuits Syst. II Express Briefs, October, 2024

An Open-Loop VCO-ADC Based on a Linearized Current Control Technique.
IEEE Trans. Very Large Scale Integr. Syst., March, 2024

A Dual Loop Current Mode Feedback Capacitor Less LDO for High Current Applications.
Proceedings of the 22nd IEEE Interregional NEWCAS Conference, 2024

2023
Lung Mechanics Tracking With Forced Oscillation Technique (FOT) Based on CMOS Synchronous Demodulation Principle.
IEEE Trans. Biomed. Circuits Syst., December, 2023

The Beginning of the AI-Enabled Preventative PAP Therapy Era: A First-in-Human Proof of Concept Interventional Study.
IEEE Trans. Biomed. Eng., October, 2023

An FLL Providing Real-Time Frequency Calibration for OOK Power Oscillator Transmitters.
IEEE Trans. Circuits Syst. II Express Briefs, September, 2023

Time-Domain Multiply-Accumulate Unit.
IEEE Trans. Very Large Scale Integr. Syst., June, 2023

A Single-TSV and Single-DCDL Approach for Skew Compensation of Multi-Dies Clock Synchronization in 3-D-ICs.
IEEE Trans. Very Large Scale Integr. Syst., April, 2023

Ordered Reliability Direct Error Pattern Testing Decoding Algorithm.
CoRR, 2023

A High-Speed Capacitor Less LDO with Multi-Loop Fast Feedback and Bandwidth Enhancement Control.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

Ordered Reliability Direct Error Pattern Testing (ORDEPT) Algorithm.
Proceedings of the IEEE Global Communications Conference, 2023

Subtractor-Based CNN Inference Accelerator.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2023

2022
Memory Optimized Hardware Implementation of Open FEC Encoder.
IEEE Trans. Very Large Scale Integr. Syst., 2022

A PVT Compensated Resistance to Frequency Converter for Sensor Array Read-Out.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Blind Background Calibration Technique for Super-Regenerative Receivers.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Design of Time-Mode PI Controller for Switched-Capacitor DC/DC Converter Using Differential Evolution Algorithm - A Design Methodology.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

High Frequency-Low Amplitude Oscillometry: Continuous Unobtrusive Monitoring of Respiratory Function on PAP Machines.
IEEE Trans. Biomed. Eng., 2022

A 14.5-Bit ENOB, 10MS/s SAR-ADC With 2<sup>nd</sup> Order Hybrid Passive-Active Resonator Noise Shaping.
IEEE Access, 2022

Low Noise, High PSRR, High-Order Piecewise Curvature Compensated CMOS Bandgap Reference.
IEEE Access, 2022

Towards Current-Mode Analog Implementation of Deep Neural Network Functions.
Proceedings of the 20th IEEE Interregional NEWCAS Conference, 2022

Design of High-Bandwidth, High-DC Gain Single-Stage Amplifier for High-Speed ADCs.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2022

2021
Efficient Implementation of 400 Gbps Optical Communication FEC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

CNN Inference Using a Preprocessing Precision Controller and Approximate Multipliers With Various Precisions.
IEEE Access, 2021

A Type-II Analog PLL with Time-Domain Processing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A High-Performance OTA with Hybrid of Inverter-Based OTA and Nauta OTA for High Speed Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Area- and Power-Efficient Staircase Encoder Implementation for High-Throughput Fiber-Optical Communications.
IEEE Trans. Very Large Scale Integr. Syst., 2020

An Intermittent Frequency Synthesizer With Accurate Frequency Detection for Fast Duty-Cycled Receivers.
IEEE Access, 2020

Design of a high-speed RF envelope detector with dynamic load and derivative superposition techniques.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

A Pulse injection background calibration technique for charge pump PLLs.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Star-Delta Connection Three-Stage Millimeter Wave Band LC Ring Oscillator.
Proceedings of the 18th IEEE International New Circuits and Systems Conference, 2020

Using Machine Learning for Person Identification through Physical Activities.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
Supply-Insensitive Digitally Controlled Delay Lines for 3-D IC Clock Synchronization Architectures.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Energy-Aware Encryption for Securing Video Transmission in Internet of Multimedia Things.
IEEE Trans. Circuits Syst. Video Technol., 2019

A Low-Power, High-Sensitivity, OOK-Super-Regenerative Receiver for WBANs.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

VCO-Based ADC With Built-In Supply Noise Immunity Using Injection-Locked Ring Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Time-Varying Respiratory Mechanics as a Novel Mechanism Behind Frequency Dependence of Impedance: A Modeling Approach.
IEEE Trans. Biomed. Eng., 2019

RETSManager: Real-estate database builder and synchronizer.
SoftwareX, 2019

Practical Considerations for Accuracy Evaluation in Sensor-Based Machine Learning and Deep Learning.
Sensors, 2019

A Comparative Study on Machine Learning Algorithms for the Control of a Wall Following Robot.
Proceedings of the 2019 IEEE International Conference on Robotics and Biomimetics, 2019

Deep Learning Training with Simulated Approximate Multipliers.
Proceedings of the 2019 IEEE International Conference on Robotics and Biomimetics, 2019

A high speed, high conversion gain RF envelope detector for SRO-receivers.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A quenching waveform with an optimal crossing point calibration for sensitivity optimization of SR receivers.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

A Dual Feedback Wideband Differential Low Noise Amplifier inl30 nm CMOS Process.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

A 130 nm CMOS Passive Mixer Utilizing Positive-Negative Feedback as the Input Transconductance.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019

2018
Beyond Rail-to-Rail Compliant Current Sources for Mismatch-Insensitive Voltage-to-Time Conversion.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Impact of Approximate Multipliers on VGG Deep Learning Network.
IEEE Access, 2018

2017
Preweighted Linearized VCO Analog-to-Digital Converter.
IEEE Trans. Very Large Scale Integr. Syst., 2017

2016
A Mismatch-Insensitive Skew Compensation Architecture for Clock Synchronization in 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst., 2016

2015
Distortion Analysis Using Volterra Series and Linearization Technique of Nano-Scale Bulk-Driven CMOS RF Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015

Crosstalk Rejection in 3-D-Stacked Interchip Communication With Blind Source Separation.
IEEE Trans. Circuits Syst. II Express Briefs, 2015

Wideband complementary metal-oxide-semiconductor double-bulk harmonic-rejection mixer.
IET Circuits Devices Syst., 2015

A self-healing technique using ZTC biasing for PVT variations compensation in 65nm CMOS technology.
Proceedings of the IEEE 28th Canadian Conference on Electrical and Computer Engineering, 2015

2014
Distortion analysis of nano-scale CMOS RF amplifier using Volterra series.
Proceedings of the IEEE 27th Canadian Conference on Electrical and Computer Engineering, 2014

An energy-efficient baseband transmitter design for implantable biotelemetry applications.
Proceedings of the 2014 IEEE Asia Pacific Conference on Circuits and Systems, 2014

2012
A high-output impedance, wide swing bulk-driven current source with dynamic biasing.
Proceedings of the 25th IEEE Canadian Conference on Electrical and Computer Engineering, 2012

2010
A Distortion-Compensated Charge Transfer Amplifier for a 1.66-MHz Cyclic Pipeline ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

High-Speed AES Encryptor With Efficient Merging Techniques.
IEEE Embed. Syst. Lett., 2010

Enhanced RF to DC CMOS rectifier with capacitor-bootstrapped transistor.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
An Adaptive ELD Compensation Technique Using a Predictive Comparator.
IEEE Trans. Circuits Syst. II Express Briefs, 2009

Bandgap Reference with Curvature Corrected Compensation using Subthreshold MOSFETs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

A charge sampling baseband filter using a new high linearity Gm for multimode receiver.
Proceedings of the 16th IEEE International Conference on Electronics, 2009

2007
High-Voltage DMOS Integrated Circuits with Floating Gate Protection Technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
A background calibration technique for multibit/stage pipelined and time-interleaved ADCs.
IEEE Trans. Circuits Syst. II Express Briefs, 2006

High-resolution background calibrated ADCs for software-defined radios.
Microelectron. J., 2006

10-b 100-MS/s Two-Channel Time-Interleaved Pipelined ADC.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006

2004
A digital blind background capacitor mismatch calibration technique for pipelined ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2004

New Sampling Method to Improve the Sfdr of Wide Bandwidth Adc Dedicated to Next Generation Wireless Transceiver.
J. Circuits Syst. Comput., 2004

A new digital background calibration technique for pipelined ADC.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
New sampling method to improve the SFDR of time-interleaved ADCs.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
A new time-interleaved architecture for high-speed A/D converters.
Proceedings of the Third International Workshop on Digital and Computational Video, 2002


  Loading...