Kalle Folkesson

According to our database1, Kalle Folkesson authored at least 5 papers between 2001 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
A 2.4-GHz RF sampling receiver front-end in 0.18-μm CMOS.
IEEE J. Solid State Circuits, 2005

A high-level dynamic-error model of a pipelined analog-to-digital converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
Robust multi-phase clock generation with reduced jitter.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

2002
Measurement verification of estimation method for time errors in a time-interleaved A/D converter system.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Modeling of dynamic errors in algorithmic A/D converters.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001


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