Kalaiselvi Sundaram

Orcid: 0000-0002-7399-3379

According to our database1, Kalaiselvi Sundaram authored at least 7 papers between 2018 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Linear Algebraic Theory for Designing the Bus Topology to Enhance the Data Transmission Process.
Wirel. Pers. Commun., 2022

Design of Precise Multiplier Using Inexact Compressor for Digital Signal Processing.
Comput. Syst. Sci. Eng., 2022

2021
Designing a Novel Star Topology using Operad Linear Differential Theory.
Wirel. Pers. Commun., 2021

Area-Energy-Error Optimized Faithful Multiplier for Digital Signal Processing.
Circuits Syst. Signal Process., 2021

2020
Area Efficient Parallel Median Filter Using Approximate Comparator and Faithful Adder.
IET Circuits Devices Syst., 2020

2019
Area-efficient parallel adder with faithful approximation for image and signal processing applications.
IET Image Process., 2019

2018
VLSI Implementation of High Speed Energy-Efficient Truncated Multiplier.
J. Circuits Syst. Comput., 2018


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