Kaijie Wei

According to our database, Kaijie Wei authored at least 17 papers between 2018 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

A data compressor for FPGA-based state vector quantum simulators.

Kaijie Wei, Hideharu Amano, Ryohei Niwase, Yoshiki Yamaguchi

Proceedings of the 14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2024

2023

RT-libSGM: FPGA-Oriented Real-Time Stereo Matching System with High Scalability.

Kaijie Wei, Yuki Kuno, Masatoshi Arai, Hideharu Amano

IEICE Trans. Inf. Syst., March, 2023

A cost/power efficient storage system with directly connected FPGA and SATA disks.

Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023

A state vector quantum simulator working on FPGAs with extensible SATA storage.

Kaijie Wei, Ryohei Niwase, Hideharu Amano, Yoshiki Yamaguchi, Takefumi Miyoshi

Proceedings of the International Conference on Field Programmable Technology, 2023

Enormous-Scale Quantum State Vector Calculation with FPGA-accelerated SATA storages.

Ryohei Niwase, Hikaru Harasawa, Yoshiki Yamaguchi, Kaijie Wei, Hideharu Amano, Takefumi Miyoshi

Proceedings of the International Conference on Field Programmable Technology, 2023

Low power implementation of Geometric High-order Decorrelation-based Source Separation on an FPGA board.

Ziquan Qin, Kaijie Wei, Hideharu Amano, Kazuhiro Nakadai

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2023

2022

Weighted Least Square Filter for Improving the Quality of Depth Map on FPGA.

Renzhi Mao, Kaijie Wei, Hideharu Amano, Yuki Kuno, Masatoshi Arai

Int. J. Netw. Comput., 2022

Multi-board FPGA Implementation to Solve the Satisfiability Problem for Multi-Agent Path Finding in Smart Factory.

Pengyu Huang, Kaijie Wei, Hideharu Amano, Kaori Ohkoda, Masashi Aono

Proceedings of the 2022 Tenth International Symposium on Computing and Networking, CANDAR 2022, 2022

An FPGA off-loading of HARK sound source localization.

Zhongyang Hou, Kaijie Wei, Hideharu Amano, Kazuhiro Nakadai

Proceedings of the 2022 Tenth International Symposium on Computing and Networking, CANDAR 2022, 2022

An Implementation of a 3D Image Filter for Motion Vector Generation on an FPGA Board.

Yuchen Chen, Kaijie Wei, Hiroaki Nishi, Hideharu Amano

Proceedings of the Tenth International Symposium on Computing and Networking, 2022

RT-libSGM: An Implementation of a Real-time Stereo Matching System on FPGA.

Kaijie Wei, Yuki Kuno, Masatoshi Arai, Hideharu Amano

Proceedings of the HEART 2022: International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, Tsukuba, Japan, June 9, 2022

2021

An implementation methodology for Neural Network on a Low-end FPGA Board.

Kaijie Wei, Koki Honda, Hideharu Amano

Int. J. Netw. Comput., 2021

CLAHE Implementation and Evaluation on a Low-End FPGA Board by High-Level Synthesis.

Koki Honda, Kaijie Wei, Masatoshi Arai, Hideharu Amano

IEICE Trans. Inf. Syst., 2021

Weight Least Square Filter for Improving the Quality of Depth Map on FPGA.

Renzhi Mao, Kaijie Wei, Hideharu Amano, Yuki Kuno, Masatoshi Arai

Proceedings of the Ninth International Symposium on Computing and Networking, 2021

2020

CLAHE implementation on a low-end FPGA board by high-level synthesis.

Koki Honda, Kaijie Wei, Masatoshi Arai, Hideharu Amano

Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020

2019

FPGA/Python Co-Design for Lane Line Detection on a PYNQ-Z1 Board.

Koki Honda, Kaijie Wei, Hideharu Amano

Proceedings of the 13th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2019

2018

FPGA Design for Autonomous Vehicle Driving Using Binarized Neural Networks.

Kaijie Wei, Koki Honda, Hideharu Amano

Proceedings of the International Conference on Field-Programmable Technology, 2018