Kaifeng Xia
Orcid: 0000-0002-5899-1578
According to our database1,
Kaifeng Xia
authored at least 6 papers
between 2013 and 2017.
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Bibliography
2017
A Memory-Based FFT Processor Design With Generalized Efficient Conflict-Free Address Schemes.
IEEE Trans. Very Large Scale Integr. Syst., 2017
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017
2016
A generalized conflict-free address scheme for arbitrary 2k-point memory-based FFT processors.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2013
Proceedings of the IEEE 10th International Conference on ASIC, 2013