Kai Lehniger

Orcid: 0000-0002-3274-2469

According to our database1, Kai Lehniger authored at least 16 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
WindowGuardian: Return Address Integrity for ESP32 Microcontrollers with Xtensa Processors using AES and Register Windows.
Proceedings of the 13th Mediterranean Conference on Embedded Computing, 2024

2023
Through the Window: Exploitation and Countermeasures of the ESP32 Register Window Overflow.
Future Internet, June, 2023

Finding gadgets in incremental code updates for return-oriented programming attacks on resource-constrained devices.
Ann. des Télécommunications, April, 2023

Window Canaries: Re-Thinking Stack Canaries for Architectures With Register Windows.
IEEE Trans. Dependable Secur. Comput., 2023

Coarse-grained Control Flow Integrity Check for Processors with Sliding Register Windows.
Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023

2022
Return-Oriented Programming Gadget Catalog for the Xtensa Architecture.
Proceedings of the 2022 IEEE International Conference on Pervasive Computing and Communications Workshops and other Affiliated Events, 2022

Code Mutation as a mean against ROP Attacks for Embedded Systems.
Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

Scalable FPGA Hardware Accelerator for SVM Inference.
Proceedings of the 11th Mediterranean Conference on Embedded Computing, 2022

Through the Window: On the exploitability of Xtensa's Register Window Overflow.
Proceedings of the 32nd International Telecommunication Networks and Applications Conference, 2022

Combination of ROP Defense Mechanisms for Better Safety and Security in Embedded Systems.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
Incremental code updates exploitation as a basis for return oriented programming attacks on resource-constrained devices.
Proceedings of the 5th Cyber Security in Networking Conference, 2021

2020
Challenges of Return-Oriented-Programming on the Xtensa Hardware Architecture.
Proceedings of the 23rd Euromicro Conference on Digital System Design, 2020

2019
The Impact of Diverse Execution Strategies on Incremental Code Updates for Wireless Sensor Networks.
Proceedings of the 8th International Conference on Sensor Networks, 2019

Using machine learning techniques for hardware performance counter classification and ROP attack detection.
Proceedings of the 31. Krypto-Tag, Berlin, Germany, October 17-18, 2019, 2019

2018
Heuristic for Page-Based Incremental Reprogramming of Wireless Sensor Nodes.
Proceedings of the 21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2018

2014
Vergleich der Beschreibung und Simulation einer Befehlssatzarchitektur in LISA und CoMet.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014


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