Kai Esmark

According to our database, Kai Esmark authored at least 14 papers between 2001 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Reliability aspects of gate oxide under ESD pulse stress.

Adrien Ille, Wolfgang Stadler, Thomas Pompl, Harald Gossner, Tilo Brodbeck, Kai Esmark, Philipp Riess, David Alvarez, Kiran V. Chatty, Robert Gauthier, Alain Bravaix

Microelectron. Reliab., 2009

Transient interferometric mapping of carrier plasma during external transient latch-up phenomena in latch-up test structures and I/O cells processed in CMOS technology.

Michael Heer, Krzysztof Domanski, Kai Esmark, Ulrich Glaser, Dionyz Pogany, Erich Gornik, Wolfgang Stadler

Microelectron. Reliab., 2009

CDM tests on interface test chips for the verification of ESD protection concepts.

Tilo Brodbeck, Kai Esmark, Wolfgang Stadler

Microelectron. Reliab., 2009

Design optimization of gate-silicided ESD NMOSFETs in a 45 nm bulk CMOS technology.

David Alvarez, Kiran V. Chatty, Christian Russ, Michel J. Abou-Khalil, Junjun Li, Robert Gauthier, Kai Esmark, Ralph Halbach, Christopher Seguin

Microelectron. Reliab., 2009

2007

SCR operation mode of diode strings for ESD protection.

Ulrich Glaser, Kai Esmark, Martin Streibl, Christian Russ, Krzysztof Domanski, Mauro Ciappa, Wolfgang Fichtner

Microelectron. Reliab., 2007

2005

High abstraction level permutational ESD concept analysis.

Martin Streibl, Franz Zängl, Kai Esmark, Robert Schwencker, Wolfgang Stadler, Harald Gossner, S. Drüen, Doris Schmitt-Landsiedel

Microelectron. Reliab., 2005

Test circuits for fast and reliable assessment of CDM robustness of I/O stages.

Wolfgang Stadler, Kai Esmark, K. Reynders, M. Zubeidat, Michael Graf, Wolfgang Wilkening, J. Willemen, Ning Qu, S. Mettler, M. Etherton

Microelectron. Reliab., 2005

Transient latch-up: experimental analysis and device simulation.

S. Bargstädt-Franke, Wolfgang Stadler, Kai Esmark, Martin Streibl, Krzysztof Domanski, Horst A. Gieser, Heinrich Wolf, Waclaw Bala

Microelectron. Reliab., 2005

2003

Harnessing the base-pushout effect for ESD protection in bipolar and BiCMOS technologies.

Martin Streibl, Kai Esmark, A. Sieck, Wolfgang Stadler, M. Wendel, J. Szatkowski, Harald Gossner

Microelectron. Reliab., 2003

2002

Case study of a technology transfer causing ESD problems.

Franz Zängl, Harald Gossner, Kai Esmark, R. Owen, G. Zimmermann

Microelectron. Reliab., 2002

Device Simulation and Backside Laser Interferometry--Powerful Tools for ESD Protection Development.

Wolfgang Stadler, Kai Esmark, Harald Gossner, Martin Streibl, M. Wendel, Wolfgang Fichtner, Dionyz Pogany, Martin Litzenberger, Erich Gornik

Microelectron. Reliab., 2002

2001

Effect of pulse risetime on trigger homogeneity in single finger grounded gate nMOSFET electrostatic discharge protection devices.

Martin Litzenberger, R. Pichler, Sergey Bychikhin, Dionyz Pogany, Erich Gornik, Kai Esmark, Harald Gossner

Microelectron. Reliab., 2001

Wide range control of the sustaining voltage of electrostatic discharge protection elements realized in a smart power technology.

Harald Gossner, T. Müller-Lynch, Kai Esmark, Matthias Stecher

Microelectron. Reliab., 2001

Advanced 2D/3D ESD device simulation - a powerful tool already used in a pre-Si phase.

Kai Esmark, Wolfgang Stadler, M. Wendel, Harald Gossner, X. Guggenmos, Wolfgang Fichtner

Microelectron. Reliab., 2001