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K. Vijayarekha

Orcid: 0000-0002-9493-1695

According to our database1, K. Vijayarekha authored at least 2 papers between 2018 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of six.

Timeline

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Bibliography

2022
Combined Optimizer for Automatic Design of Machine Learning-Based Fault Classifier for Multilevel Inverters.
[BibTeX]
[DOI]
Velu Sudha
,
K. Vijayarekha
,
Rakesh Kumar Sidharthan
,
Natarajan Prabaharan
IEEE Access, 2022

2018
A Smart IOT System for Analysis and Mitigation of Harmonics and Inter Harmonics in the Input Current of MRAS Based Sensorless Speed Controlled Induction Motor Using Isolated Zeta Converter.
[BibTeX]
[DOI]
D. Uma
,
K. Vijayarekha
Wirel. Pers. Commun., 2018


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