K. S. Vasundara Patel

According to our database1, K. S. Vasundara Patel authored at least 7 papers between 2009 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
Hardware implementation of a modified SSD LDPC decoder.
Int. J. Comput. Aided Eng. Technol., 2021

2020
Study of LDPC decoders with quadratic residue sequence for communication system.
Int. J. Inf. Comput. Secur., 2020

2012
Modeling of Sigma-Delta ADC with High Resolution Decimation Filter.
Proceedings of the Signal Processing and Information Technology, 2012

2011
Design and Complexity Analysis of Reed Solomon Code Algorithm for Advanced RAID System in Quaternary Domain.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011

Design of High Performance Quaternary Adders.
Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

2010
Arithmetic Operations in Multi-Valued Logic
CoRR, 2010

2009
Moving From Binary Towards Multi-valued logic.
Proceedings of the 2009 International Conference on Computer Design, 2009


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