K. Rahimunnisa

According to our database, K. Rahimunnisa authored at least 4 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2014

FPGA implementation of AES algorithm for high throughput using folded parallel architecture.

K. Rahimunnisa, P. Karthigaikumar, Soumiya Rasheed, J. Jayakumar, S. Suresh Kumar

Secur. Commun. Networks, 2014

2013

PSP: Parallel sub-pipelined architecture for high throughput AES on FPGA and ASIC.

K. Rahimunnisa, P. Karthigaikumar, N. Anitha Christy, S. Suresh Kumar, J. Jayakumar

Central Eur. J. Comput. Sci., 2013

2012

Efficient Techniques for the Implementation of AES SubByte and MixColumn Transformations.

K. Rahimunnisa, M. Priya Zach, S. Suresh Kumar, J. Jayakumar

Proceedings of the Advances in Computing and Information Technology - Proceedings of the Second International Conference on Advances in Computing and Information Technology (ACITY) July 13-15, 2012, Chennai, India, 2012

2011

0.18um CMOS Technology in Implementation of S Box and a Modified S Box.

K. Rahimunnisa, K. Rajeshkumar, S. Suresh Kumar

Proceedings of the Recent Trends in Wireless and Mobile Networks, 2011