K. Neethu

According to our database, K. Neethu authored at least 6 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

ELEMENT: Energy-Efficient Multi-NoP Architecture for IMC-Based 2.5-D Accelerator for DNN Training.

K. Neethu, K. C. Sharin Shahana, Rekha K. James, John Jose, Sumit K. Mandal

IEEE Des. Test, December, 2023

Modelling and Impact Analysis of Antipode Attack in Bufferless On-Chip Networks.

Rose George Kunthara, V. R. Josna, K. Neethu, Rekha K. James, John Jose

SN Comput. Sci., May, 2023

2022

RIBiT: Reduced Intra-flit Bit Transitions for Bufferless NoC.

Akshay Sarman, Alwin Shaju, Rose George Kunthara, K. Neethu, Rekha K. James, John Jose

Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022

2021

Dual Stage Encoding Technique to Minimize Cross Coupling across NoC Links.

S. Sharon Dev, S. M. Krishna, S. S. Archana, Rose George Kunthara, K. Neethu, Rekha K. James

Proceedings of the 25th International Symposium on VLSI Design and Test, 2021

2019

2L-2D Routing for Buffered Mesh Network-on-Chip.

Rose George Kunthara, K. Neethu, Rekha K. James, Simi Zerine Sleeba, Tripti S. Warrier, John Jose

Proceedings of the VLSI Design and Test - 23rd International Symposium, 2019

DoLaR: Double Layer Routing for Bufferless Mesh Network-on-Chip.

Rose George Kunthara, K. Neethu, Rekha K. James, Simi Zerine Sleeba, John Jose

Proceedings of the TENCON 2019, 2019