Jyh-Mou Tseng

According to our database1, Jyh-Mou Tseng authored at least 2 papers between 1997 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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PhD thesis 
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Links

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Bibliography

1999
Two-level logic minimization for low power.
ACM Trans. Design Autom. Electr. Syst., 1999

1997
A power driven two-level logic optimizer.
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997


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