Jyh-Jer Cho
According to our database1,
Jyh-Jer Cho
authored at least 3 papers
in 1995.
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Bibliography
1995
A CMOS transistor-only 8-b 4.5-Ms/s pipelined analog-to-digital converter using fully-differential current-mode circuit techniques.
IEEE J. Solid State Circuits, May, 1995
Precise CMOS current sample/hold circuits using differential clock feedthrough attenuation techniques.
IEEE J. Solid State Circuits, January, 1995
A 1.5 V CMOS Current-Mode Cyclic Analog-to-Digital Converter with Digital Error Correction.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995