Jürgen Schietke

According to our database, Jürgen Schietke authored at least 4 papers between 1998 and 2002.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2002

Maximum mean weight cycle in a digraph and minimizing cycle time of a logic chip.

Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen

Discret. Appl. Math., 2002

2000

Platzierungsbasierte Logikoptimierung komplexer VLSI Chips.

Jürgen Koehl, Jürgen Schietke

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000

1999

Cycle time and slack optimization for VLSI-chips.

Christoph Albrecht, Bernhard Korte, Jürgen Schietke, Jens Vygen

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998

Timing Analysis and Optimization of a High-Performance CMOS Processor Chipset.

Uwe Fassnacht, Jürgen Schietke

Proceedings of the 1998 Design, 1998