Jürgen Ruf

According to our database, Jürgen Ruf authored at least 65 papers between 1997 and 2017.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2017

Using Robustness Testing to Handle Incomplete Verification Results When Combining Verification and Testing Techniques.

Stefan Huster, Jonas Ströbele, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Testing Software and Systems, 2017

2015

Scalable and Optimized Hybrid Verification of Embedded Software.

Jörg Behrend, Djones Lettnin, Alexander Grünhage, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

J. Electron. Test., 2015

Efficient Testing of Different Loop Paths.

Stefan Huster, Sebastian Burg, Hanno Eichelberger, Jo Laufenberg, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Software Engineering and Formal Methods - 13th International Conference, 2015

Efficient Fault Localization During Replay of Embedded Software.

Hanno Eichelberger, Thomas Kropf, Jürgen Ruf, Thomas Greiner, Wolfgang Rosenstiel

Proceedings of the 41st Euromicro Conference on Software Engineering and Advanced Applications, 2015

2014

More Flexible Object Invariants with Less Specification Overhead.

Stefan Huster, Patrick Heckeler, Hanno Eichelberger, Jürgen Ruf, Sebastian Burg, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Software Engineering and Formal Methods - 12th International Conference, 2014

Increasing Software Reliability by Integrating Formal Verification and Robustness Testing.

Stefan Huster, Merdin Macic, Sebastian Burg, Hanno Eichelberger, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014

Erkennen von Speicherverletzungen im Testbetrieb von eingebetteter Software.

Hanno Eichelberger, Patrick Heckeler, Jürgen Ruf, Stefan Huster, Sebastian Burg, Thomas Kropf, Wolfgang Rosenstiel, Thomas Greiner

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014

LoCEG: Local Preprocessing in SAT-Solving through Counter-Example Generation.

Sebastian Burg, Patrick Heckeler, Stefan Huster, Hanno Eichelberger, Jörg Behrend, Jürgen Ruf, Thomas Kropf, Oliver Bringmann

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, 2014

Optimized hybrid verification of embedded software.

Jörg Behrend, Alexander Grünhage, Douglas Schroeder, Djones Lettnin, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the 15th Latin American Test Workshop, 2014

Debugger-Based Record Replay and Dynamic Analysis for In-Vehicle Infotainment.

Hanno Eichelberger, Jürgen Ruf, Thomas Kropf, Thomas Greiner, Wolfgang Rosenstiel

Proceedings of the Computational Science and Its Applications - ICCSA 2014 - 14th International Conference, Guimarães, Portugal, June 30, 2014

2013

A Software Testing Framework to Integrate Formal Verification Results.

Stefan Huster, Patrick Heckeler, Jürgen Ruf, Sebastian Burg, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen.

Hanno Eichelberger, Patrick Heckeler, Stefan Huster, Sebastian Burg, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Bastian Schlich

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

2012

Optimized Static Parameter Assignment for Semiformal Software Verification.

Alexander Grünhage, Jörg Behrend, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Djones Lettnin

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2012

2011

DWARF-driven Equivalence Checking of UML Statecharts and Software Components.

Patrick Heckeler, Jörg Behrend, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Roland Weiss

Softwaretechnik-Trends, 2011

Scalable and Extendable Hybrid Verification Platform.

Jörg Behrend, Patrick Heckeler, Stefan Huster, Djones Lettnin, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2011

Scalable hybrid verification for embedded software.

Jörg Behrend, Djones Lettnin, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Design, Automation and Test in Europe, 2011

2010

State-based Analysis and UML-driven Equivalence Checking for C++ State Machines.

Patrick Heckeler, Jörg Behrend, Thomas Kropf, Jürgen Ruf, Wolfgang Rosenstiel, Roland J. Weiss

Proceedings of the FM+AM 2010, 2010

Towards assertion-based verification of heterogeneous system designs.

Stefan Lämmermann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Alexander Viehl, Alexander Jesser, Lars Hedrich

Proceedings of the Design, Automation and Test in Europe, 2010

2009

Design and verification of the IBM System z10 I/O subsystem chips.

Thomas Schlipf, Markus M. Helms, Jürgen Ruf, M. Klein, Rainer Dorsch, B. Hoppe, Walter Lipponer, S. Boekholt, T. Rower, Manfred H. Walz, S. Junghans

IBM J. Res. Dev., 2009

Semiformal verification of temporal properties in automotive hardware dependent software.

Djones Lettnin, Pradeep Kumar Nalla, Jörg Behrend, Jürgen Ruf, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Volker Schönknecht, Stephan Reitemeyer

Proceedings of the Design, Automation and Test in Europe, 2009

2008

Advanced Assertion-Based Design for Mixed-Signal Verification.

Alexander Jesser, Stefan Lämmermann, Alexander Pacholik, Roland Weiss, Jürgen Ruf, Lars Hedrich, Wolfgang Fengler, Thomas Kropf, Wolfgang Rosenstiel

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

Verification of Temporal Properties in Automotive Embedded Software.

Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schönknecht, Stephan Reitemeyer

Proceedings of the Design, Automation and Test in Europe, 2008

2007

Semiformal Verification of Temporal Properties in Embedded Software.

Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Roland J. Weiss, Axel G. Braun, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

UML/SysML-Systemanalyse zur Generierung von formalen Verifikationseigenschaften für verschiedene Abstraktionsebenen.

Stefan Lämmermann, Jörg Behrend, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

Transaction Modeling and RTL Simulation Analysis.

Rainer Dorsch, Jürgen Ruf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2007

Coverage Driven Verification applied to Embedded Software.

Djones Lettnin, Markus Winterholer, Axel G. Braun, Joachim Gerlach, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Grid Based Fast Falsification For Bounded Property Checking.

Pradeep Kumar Nalla, Jörg Behrend, Prakash Mohan Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Forum on specification and Design Languages, 2007

2006

Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen.

Stefan Lämmermann, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006

Monitoring-based Formal Hardware Verification.

Paul Duplys, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2006

Fast falsification based on symbolic bounded property checking.

Prakash Mohan Peranandam, Pradeep Kumar Nalla, Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the 43rd Design Automation Conference, 2006

2005

Distributed Symbolic Bounded Property Checking.

Pradeep Kumar Nalla, Roland J. Weiss, Prakash Mohan Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the 4th International Workshop on Parallel and Distributed Methods in Verification, 2005

Overlap reduction in symbolic system traversal.

Prakash Mohan Peranandam, Pradeep Kumar Nalla, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Tenth IEEE International High-Level Design Validation and Test Workshop 2005, Napa Valley, CA, USA, November 30, 2005

Efficient and Customizable Integration of Temporal Properties.

Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Forum on specification and Design Languages, 2005

2004

Transactional Level Verification and Coverage Metrics by Means of Symbolic Simulation.

Prakash Mohan Peranandam, Roland J. Weiss, Jürgen Ruf, Thomas Kropf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2004

Dynamic guiding of bounded property checking.

Prakash Mohan Peranandam, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Ninth IEEE International High-Level Design Validation and Test Workshop 2004, 2004

Modeling and Formal Verification of Production Automation Systems.

Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Integration of Software Specification Techniques for Applications in Engineering, 2004

Specification and Formal Verification of Temporal Properties of Production Automation Systems.

Stephan Flake, Wolfgang Müller, Ulrich Pape, Jürgen Ruf

Proceedings of the Integration of Software Specification Techniques for Applications in Engineering, 2004

2003

Optimized Temporal Logic Compilation.

Andreas Krebs, Jürgen Ruf

J. Univers. Comput. Sci., 2003

Symbolic Verification and Analysis of Discrete Timed Systems.

Jürgen Ruf, Thomas Kropf

Formal Methods Syst. Des., 2003

Bounded Property Checking with Symbolic Simulation.

Jürgen Ruf, Prakash Mohan Peranandam

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2003

Using Symbolic Simulation for Bounded Property Checking.

Jürgen Ruf, Prakash Mohan Peranandam, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Forum on specification and Design Languages, 2003

2002

Combination of Simulation and Formal Verification.

Jürgen Ruf, Thomas Kropf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2002

A Visual Approach to Validating System Level Designs.

Jürgen Ruf, Thomas Kropf, Jochen Klose

Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002

Formal Data Analysis of Timed Finite State Systems.

Jürgen Ruf, Thomas Kropf

Proceedings of the 14th Euromicro Conference on Real-Time Systems (ECRTS 2002), 2002

2001

RAVEN: Real-Time Analyzing and Verification Environment.

Jürgen Ruf

J. Univers. Comput. Sci., 2001

Correctness of Efficient Real-Time Model Checking.

Wolfgang Reif, Gerhard Schellhorn, Tobias Vollmer, Jürgen Ruf

J. Univers. Comput. Sci., 2001

Formale Verifikation diskreter Echtzeitsysteme (Formal Verification of Discrete Real-Time Systems).

Jürgen Ruf, Thomas Kropf

Informationstechnik Tech. Inform., 2001

Customer-Oriented Systems Design through Virtual Prototypes.

Stephan Flake, Christian Geiger, Wolfgang Müller, Volker Paelke, Waldemar Rosenbach, Jürgen Ruf

Proceedings of the 10th IEEE International Workshops on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE 2001), 2001

Data Analysis of Timed Finite State Systems.

Jürgen Ruf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2001

Simulation-guided property checking based on a multi-valued AR-automata.

Jürgen Ruf, Dirk W. Hoffmann, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

The simulation semantics of systemC.

Jürgen Ruf, Dirk W. Hoffmann, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Wolfgang Müller

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

2000

Techniken zur Modellierung und Verifikation von Echtzeitsystemen.

Jürgen Ruf

PhD thesis, 2000

A Toolset for the Symbolic Examination of Finite State Transition Systems.

Jürgen Ruf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000

Structured English for Model Checking Specification.

Stephan Flake, Wolfgang Müller, Jürgen Ruf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000

Checking temporal properties under simulation of executable system descriptions.

Jürgen Ruf, Dirk W. Hoffmann, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the IEEE International High-Level Design Validation and Test Workshop 2000, 2000

Do You Trust Your Model Checker?

Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer

Proceedings of the Formal Methods in Computer-Aided Design, Third International Conference, 2000

Simulation Meets Verification: Checking Temporal Properties in SystemC.

Dirk W. Hoffmann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel

Proceedings of the 26th EUROMICRO 2000 Conference, 2000

Analyzing Real-Time Systems.

Jürgen Ruf, Thomas Kropf

Proceedings of the 2000 Design, 2000

1999

Modeling Real-Time Systems with I/O-Interval Structures.

Jürgen Ruf, Thomas Kropf

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1999

Modleing and Checking Networks of Communicating Real-Time Process.

Jürgen Ruf, Thomas Kropf

Proceedings of the Correct Hardware Design and Verification Methods, 1999

1998

A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems.

Thomas Kropf, Jürgen Ruf, Klaus Schneider, Markus Wild

Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 1998

Using MTBDDs for Compostion and Model Checking of Real-Time Systems.

Jürgen Ruf, Thomas Kropf

Proceedings of the Formal Methods in Computer-Aided Design, 1998

1997

A New Algorithm for Discrete Timed Symbolic Model Checking.

Jürgen Ruf, Thomas Kropf

Proceedings of the Hybrid and Real-Time Systems, 1997

Using MTBDDs for discrete timed symbolic model checking.

Thomas Kropf, Jürgen Ruf

Proceedings of the European Design and Test Conference, 1997

Symbolic model checking for a discrete clocked temporal logic with intervals.

Jürgen Ruf, Thomas Kropf

Proceedings of the Advances in Hardware Design and Verification, 1997