Jürgen Alt

According to our database1, Jürgen Alt authored at least 8 papers between 1990 and 2011.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Links

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Bibliography

2011
Future of EDA: Usual suspect or silent hero for successful semiconductor business?
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

1995
Fehlersimulation synchroner Schaltungen unter Berücksichtigung nicht-klassischer Fehler.
PhD thesis, 1995

CURRENT: a test generation system for I<sub>DDQ</sub> testing.
Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Deterministic test generation for non-classical faults on the gate level.
Proceedings of the 4th Asian Test Symposium (ATS '95), 1995

1993
Simulation of non-classical faults on the gate level-fault modeling.
Proceedings of the 11th IEEE VLSI Test Symposium (VTS'93), 1993

Simulation of non-classical Faults on the Gate Level - The Fault Simulator COMISM -.
Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992
Test generation for IDDQ testing and leakage fault detection in CMOS circuits.
Proceedings of the conference on European design automation, 1992

1990
On the Efficiency of the Transition Fault Model for Delay Faults.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990


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