Juraj Priesol

Orcid: 0000-0003-1477-1976

According to our database1, Juraj Priesol authored at least 5 papers between 2018 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2023
Automatic Detection and Counting of Defects from Cathodoluminescence Maps of GaN Layers.
Proceedings of the 12th Mediterranean Conference on Embedded Computing, 2023

2019
Device and Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Cells Comprising D- and E-Mode HEMTs.
J. Circuits Syst. Comput., 2019

Perimeter Driven Transport in the p-GaN Gate as a Limiting Factor for Gate Reliability.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

Neural Network for Circuit Models of Monolithic InAlN/GaN NAND and NOR Logic Gates.
Proceedings of the 14th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2019

2018
Device and circuit models of InAlN/GaN D- and dual-gate E-mode HEMTs for design and characterisation of monolithic NAND logic cell.
Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018


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