Juraj Brenkus

According to our database, Juraj Brenkus authored at least 15 papers between 2008 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

High side power MOSFET switch driver for a low-power AC/DC converter.

Miroslav Potocný, Juraj Brenkus, Viera Stopjaková

Proceedings of the 22nd IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2019

2017

A Novel Method Towards Time-Efficient Fault Analysis of Analog and Mixed-Signal Circuits.

Juraj Brenkus, Viera Stopjaková, Viera Cernanová, Daniel Arbet, Lukás Nagy, Vladimír Sedlák

J. Circuits Syst. Comput., 2017

2016

Impedance calculation based method for AC fault analysis of mixed-signal circuits.

Juraj Brenkus, Viera Stopjaková, Lukás Nagy, Daniel Arbet

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

Low-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology.

Daniel Arbet, Martin Kovác, Lukás Nagy, Viera Stopjaková, Juraj Brenkus

Proceedings of the 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2016

2014

BIST architecture for oscillation test of analog ICs and investigation of test hardware influence.

Daniel Arbet, Viera Stopjaková, Juraj Brenkus, Gábor Gyepes, Martin Kovác, Libor Majer

Microelectron. Reliab., 2014

A new I_DDT test approach and its efficiency in covering resistive opens in SRAM arrays.

Gábor Gyepes, Viera Stopjaková, Daniel Arbet, Libor Majer, Juraj Brenkus

Microprocess. Microsystems, 2014

Current Sensing Completion Detection in Single-Rail Asynchronous Systems.

Lukás Nagy, Viera Stopjaková, Juraj Brenkus

Comput. Informatics, 2014

A novel impedance calculation method and its time efficiency evaluation.

Juraj Brenkus, Viera Stopjaková, Daniel Arbet, Gábor Gyepes, Libor Majer

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

2013

Numerical method for DC fault analysis simplification and simulation time reduction.

Juraj Brenkus, Viera Stopjaková, Gábor Gyepes

Proceedings of the 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2013

2012

Application of IDDT test towards increasing SRAM reliability in nanometer technologies.

Gábor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjaková

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

OBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters.

Daniel Arbet, Gábor Gyepes, Juraj Brenkus, Viera Stopjaková

Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

2011

Comparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies.

Gábor Gyepes, Juraj Brenkus, Daniel Arbet, Viera Stopjaková

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

Increasing the efficiency of analog OBIST using on-chip compensation of technology variations.

Daniel Arbet, Juraj Brenkus, Gábor Gyepes, Viera Stopjaková

Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

2009

Comparison of different test strategies on a mixed-signal circuit.

Juraj Brenkus, Viera Stopjaková, Ronny Vanhooren, Anton Chichkov

Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2009

2008

Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation.

Juraj Brenkus, Viera Stopjaková, Jozef Mihálov

Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), 2008