Junyoung Ko
Orcid: 0000-0003-3757-9813
According to our database1,
Junyoung Ko
authored at least 7 papers
between 2015 and 2024.
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Bibliography
2024
Sensors, January, 2024
2021
A 512Gb 3b/Cell 7<sup>th</sup> -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021
2020
IEEE Access, 2020
2019
IEEE Trans. Very Large Scale Integr. Syst., 2019
2017
Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
2016
WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
2015
Temperature-Tracking Sensing Scheme With Adaptive Precharge and Noise Compensation Scheme in PRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2015