Junyoung Jang
Orcid: 0000-0001-8022-4343Affiliations:
- Yonsei University, Seoul, South Korea
According to our database1,
Junyoung Jang
authored at least 8 papers
between 2019 and 2024.
Collaborative distances:
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Bibliography
2024
An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series.
IEEE Access, 2024
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
A 1.5 V 2 GS/s 82.1 dB-SFDR Track and Hold Circuit Based on the Time-Divided Post-Distortion Cancelation Technique.
IEEE Trans. Circuits Syst. II Express Briefs, 2022
IEEE J. Solid State Circuits, 2022
2020
Optimal control problem of an SIR reaction-diffusion model with inequality constraints.
Math. Comput. Simul., 2020
A Time Domain Artificial Intelligence Radar System Using 33-GHz Direct Sampling for Hand Gesture Recognition.
IEEE J. Solid State Circuits, 2020
2019
An IR-UWB CMOS Transceiver for High-Data-Rate, Low-Power, and Short-Range Communication.
IEEE J. Solid State Circuits, 2019
A Time Domain Artificial Intelligence Radar for Hand Gesture Recognition Using 33-GHz Direct Sampling.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019