Junpeng Wang

Orcid: 0000-0002-8810-3172

Affiliations:
  • University of Science and Technology of China, School of Microelectronics, Hefei, China


According to our database1, Junpeng Wang authored at least 14 papers between 2020 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2024
NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators With 3-D Stacked-DRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2024

Allspark: Workload Orchestration for Visual Transformers on Processing In-Memory Systems.
CoRR, 2024

ILP-based Multi-Branch CNNs Mapping on Processing-in-Memory Architecture.
Proceedings of the 6th IEEE International Conference on AI Circuits and Systems, 2024

2023
Task Modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems with Heterogeneous Resources.
ACM Trans. Design Autom. Electr. Syst., November, 2023

Memory-aware Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems.
ACM Trans. Design Autom. Electr. Syst., January, 2023

DDAM: Data Distribution-Aware Mapping of CNNs on Processing-In-Memory Systems.
ACM Trans. Design Autom. Electr. Syst., 2023

Reliability-Driven Memristive Crossbar Design in Neuromorphic Computing Systems.
IEEE Trans Autom. Sci. Eng., 2023

NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM.
CoRR, 2023

A Lightweight Stereo Matching Neural Network Based on Depthwise Separable Convolution.
Proceedings of the IEEE International Conference on Integrated Circuits, 2023

2022
Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs.
CoRR, 2022

Sense: Model Hardware Co-design for Accelerating Sparse Neural Networks.
CoRR, 2022

2021
A Non-volatile Computing-in-Memory ReRAM Macro using Two-bit Current-Mode Sensing Amplifier.
Proceedings of the 10th IEEE Non-Volatile Memory Systems and Applications Symposium, 2021

Reliability-Driven Neuromorphic Computing Systems Design.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020
Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020


  Loading...