Junji Kitamichi
According to our database1,
Junji Kitamichi
authored at least 22 papers
between 1994 and 2016.
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Bibliography
2016
Proposing a Highly Reliable Real-Time Operating System for a Processor with a Fault Self-Detecting Mechanism.
Proceedings of the 13th International Conference on Embedded Software and Systems, 2016
2015
Proceedings of the 6th International Conference on Ambient Systems, 2015
2014
Proceedings of the 8th International Conference on Ubiquitous Information Management and Communication, 2014
Proceedings of the International Conference on Computing, Networking and Communications, 2014
2013
Proceedings of the IEEE 9th International Conference on Mobile Ad-hoc and Sensor Networks, 2013
Proceedings of the International Joint Conference on Awareness Science and Technology & Ubi-Media Computing, 2013
2008
Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems.
J. Comput., 2008
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008
Optimizing Two-Dimensional Continuous Dynamic Programming for Cell Broadband Engine Processors.
Proceedings of the Japan-China Joint Workshop on Frontier of Computer Science and Technology, 2008
2007
Proposal of Dynamic Module Library for System Level Modeling and Simulation of Dynamically Reconfigurable Systems.
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the FPL 2007, 2007
2005
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
2001
A Conformance Testing Method for Communication Protocols Modeled as Concurrent DFSMs.
Proceedings of the 15th International Conference on Information Networking, 2001
1999
IEEE Trans. Syst. Man Cybern. Part B, 1999
Formal Design Verification for Correctness of Pipelined Microprocessors with Out-of-order Instruction Execution.
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
Proceedings of the 1999 Conference on Asia South Pacific Design Automation, 1999
1998
IEEE Trans. Syst. Man Cybern. Part B, 1998
A gradual neural-network algorithm for jointly time-slot/code assignment problems in packet radio networks.
IEEE Trans. Neural Networks, 1998
A three-stage greedy and neural-network approach for the subgraph isomorphism problem.
Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, 1998
1997
Proceedings of International Conference on Neural Networks (ICNN'97), 1997
1994
Automatic Correctness Proof of the Implementation of Synchronous Sequential Circuits Using an Algebraic Approach.
Proceedings of the Theorem Provers in Circuit Design, 1994
Hardware synthesis from a restricted class of LOTOS expressions.
Proceedings of the Protocol Specification, 1994