Junhua Tan

According to our database, Junhua Tan authored at least 5 papers between 2011 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

An improved direct-forcing immersed boundary method with inward retraction of Lagrangian points for simulation of particle-laden flows.

Kun Luo, Zhuo Wang, Junhua Tan, Jianren Fan

J. Comput. Phys., 2019

2016

10.3 An analog front-end for 100BASE-T1 automotive Ethernet in 28nm CMOS.

Hui Pan, Junhua Tan, Evelyn Wenting Wang, Jingguang Wang, Karthik Swaminathan, Ramalingam Pandarinathan, Ramesh Pasagadugula, VamshiKrishna Yakkala, Mostafa Hammad, Karim Abdelhalim, Kaijun Li, Su Cui, Jing Wang, Ahmad Chini, Mehmet Tazebay, Suresh Venkatesan, Derek Tam, Ichiro Fujimori, Kambiz Vakilian

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2014

A Full-Duplex Line Driver for Gigabit Ethernet With Rail-to-Rail Class-AB Output Stage in 28 nm CMOS.

Hui Pan, Yuan Yao, Mostafa Hammad, Junhua Tan, Karim Abdelhalim, Evelyn Wenting Wang, Rick C. J. Hsu, Derek Tam, Ichiro Fujimori

IEEE J. Solid State Circuits, 2014

8.6 A full-duplex line driver for Gigabit Ethernet with rail-to-rail class-AB output stage in 28nm CMOS.

Hui Pan, Yuan Yao, Mostafa Hammad, Junhua Tan, Karim Abdelhalim, Evelyn Wenting Wang, Rick C. J. Hsu, Jenny Yu, Joseph N. Y. Aziz, Derek Tam, Ichiro Fujimori

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2011

A 0.6-to-200MSPS speed reconfigurable and 1.9-to-27mW power scalable 10bit ADC.

Heng Zhang, Junhua Tan, Chao Zhang, Hongbo Chen, Edgar Sánchez-Sinencio

Proceedings of the 37th European Solid-State Circuits Conference, 2011