Junheng Zhu
Orcid: 0000-0002-0329-1769
According to our database1,
Junheng Zhu
authored at least 15 papers
between 2016 and 2024.
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Collaborative distances:
Timeline
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Bibliography
2024
S2EFT: Spectral-Spatial-Elevation Fusion Transformer for hyperspectral image and LiDAR classification.
Knowl. Based Syst., January, 2024
MS2CANet: Multiscale Spatial-Spectral Cross-Modal Attention Network for Hyperspectral Image and LiDAR Classification.
IEEE Geosci. Remote. Sens. Lett., 2024
2023
A Novel Semi-Supervised Long-Tailed Learning Framework With Spatial Neighborhood Information for Hyperspectral Image Classification.
IEEE Geosci. Remote. Sens. Lett., 2023
2022
A 32-MHz, 34-μW Temperature-Compensated RC Oscillator Using Pulse Density Modulated Resistors.
IEEE J. Solid State Circuits, 2022
A 3.2-GHz 405 fs<sub>rms</sub> Jitter -237.2 dB FoM<sub>JIT</sub> Ring-Based Fractional-N Synthesizer.
IEEE J. Solid State Circuits, 2022
2021
A 3.2GHz 405fsrms jitter -237.2dB-FoMJIT ring-based fractional-N synthesizer using two-step quantization noise cancellation and piecewise-linear nonlinearity correction.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2021
2020
3.2 A 0.0088mm<sup>2</sup> Resistor-Based Temperature Sensor Achieving 92fJ·K<sup>2</sup> FoM in 65nm CMOS.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
3.5 A 34µW 32MHz RC Oscillator with ±530ppm Inaccuracy from -40°C to 85°C and 80ppm/V Supply Sensitivity Enabled by Pulse-Density Modulated Resistors.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020
2019
IEEE Trans. Circuits Syst. II Express Briefs, 2019
A 0.016 mm<sup>2</sup> 0.26- $\mu$ W/MHz 60-240-MHz Digital PLL With Delay-Modulating Clock Buffer in 65 nm CMOS.
IEEE J. Solid State Circuits, 2019
2017
A 0.0021 mm<sup>2</sup> 1.82 mW 2.2 GHz PLL Using Time-Based Integral Control in 65 nm CMOS.
IEEE J. Solid State Circuits, 2017
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
A 45-75MHz 197-452µW oscillator with 164.6dB FoM and 2.3psrms period jitter in 65nm CMOS.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016