Jungwhan Choi

According to our database, Jungwhan Choi authored at least 12 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2019

Sparse-Insertion Write Cache to Mitigate Write Disturbance Errors in Phase Change Memory.

Jaemin Jang, Wongyu Shin, Jungwhan Choi, Yongju Kim, Lee-Sup Kim

IEEE Trans. Computers, 2019

DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells.

Jungwhan Choi, Jaemin Jang, Lee-Sup Kim

IEEE Trans. Computers, 2019

2018

Elaborate Refresh: A Fine Granularity Retention Management for Deep Submicron DRAMs.

Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Hakseung Lee, Lee-Sup Kim

IEEE Trans. Computers, 2018

2017

In-DRAM Data Initialization.

Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim

IEEE Trans. Very Large Scale Integr. Syst., 2017

Rank-Level Parallelism in DRAM.

Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Lee-Sup Kim

IEEE Trans. Computers, 2017

Bank-Group Level Parallelism.

Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim

IEEE Trans. Computers, 2017

Refresh-Aware Write Recovery Memory Controller.

Jaemin Jang, Wongyu Shin, Jungwhan Choi, Jinwoong Suh, Yongkee Kwon, Yongju Kim, Lee-Sup Kim

IEEE Trans. Computers, 2017

2016

DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing.

Wongyu Shin, Jungwhan Choi, Jaemin Jang, Jinwoong Suh, Youngsuk Moon, Yongkee Kwon, Lee-Sup Kim

IEEE Trans. Computers, 2016

Q-DRAM: Quick-Access DRAM with Decoupled Restoring from Row-Activation.

Wongyu Shin, Jungwhan Choi, Jaemin Jang, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Hongsik Kim, Lee-Sup Kim

IEEE Trans. Computers, 2016

Energy Efficient Data Encoding in DRAM Channels Exploiting Data Value Similarity.

Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2015

Multiple clone row DRAM: a low latency and area optimized DRAM.

Jungwhan Choi, Wongyu Shin, Jaemin Jang, Jinwoong Suh, Yongkee Kwon, Youngsuk Moon, Lee-Sup Kim

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

2014

NUAT: A non-uniform access time memory controller.

Wongyu Shin, Jeongmin Yang, Jungwhan Choi, Lee-Sup Kim

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014