Jung-Ping Yang
According to our database1,
Jung-Ping Yang
authored at least 2 papers
between 2012 and 2017.
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Bibliography
2017
12.3 A low-power and high-performance 10nm SRAM architecture for mobile applications.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017
2012
A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC<sup>2</sup>RA) circuitry achieving 3x reduction on speed variation for single ended arrays.
Proceedings of the Symposium on VLSI Circuits, 2012