Jung Hwan Choi

Orcid: 0009-0009-4976-9930

According to our database1, Jung Hwan Choi authored at least 16 papers between 2006 and 2023.

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Bibliography

2023
Complexity-Aware Layer-Wise Mixed-Precision Schemes With SQNR-Based Fast Analysis.
IEEE Access, 2023

2022
SQNR-based Layer-wise Mixed-Precision Schemes with Computational Complexity Consideration.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

2010
Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy.
IEEE Trans. Very Large Scale Integr. Syst., 2010

Improved clock-gating control scheme for transparent pipeline.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009
Variation-Aware Low-Power Synthesis Methodology for Fixed-Point FIR Filters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008
Profit Aware Circuit Design Under Process Variations Considering Speed Binning.
IEEE Trans. Very Large Scale Integr. Syst., 2008

O<sup>2</sup>C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008

Enhanced Westwood as per Vegas-Based Estimator with Slowstart Threshold for High-Speed Networks.
Proceedings of the Selected Papers of the Sixth International Conference on Computational Sciences and Its Applications, 2008

2007
Self-Consistent Approach to Leakage Power and Temperature Estimation to Predict Thermal Runaway in FinFET Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

A process variation aware low power synthesis methodology for fixed-point FIR filters.
Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

The effect of process variation on device temperature in FinFET circuits.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006
Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Speed binning aware design methodology to improve profit under parameter variations.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006

Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006


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