Jung-Chin Lai

According to our database, Jung-Chin Lai authored at least 5 papers between 2014 and 2020.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2020

All-Digital Mismatched Calibrator and Compensator for SR Latch-Based Variable-Gain Time Amplifier.

Kuan-Chieh Chao, Jung-Chin Lai, Terng-Yin Hsu

IEEE Access, 2020

2017

Cost-Effective Time-to-Digital Converter Using Time-Residue Feedback.

Jung-Chin Lai, Terng-Yin Hsu

IEEE Trans. Ind. Electron., 2017

The calibration of gain error for time amplifier embedded in time-to-digital converter.

Jung-Chin Lai, Frank Hsiao

Proceedings of the IEEE Conference on Dependable and Secure Computing, 2017

2015

Mismatch-tolerant time amplifier with embedded self-calibration.

Jung-Chin Lai, Terng-Yin Hsu

Proceedings of the IEEE 5th International Conference on Consumer Electronics - Berlin, 2015

2014

An all-digital delay-locked loop for high-speed memory interface applications.

Shih-Lun Chen, Ming-Jing Ho, Yu-Ming Sun, Maung Wai Lin, Jung-Chin Lai

Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014