Juneet Kumar Meka

According to our database1, Juneet Kumar Meka authored at least 5 papers between 2021 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2024
Pattern Based Synthetic Benchmark Generation for Hardware Security Applications.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

ACT: Attributed Circuit Transformation System for Synthetic Circuit Generation.
Proceedings of the 67th IEEE International Midwest Symposium on Circuits and Systems, 2024

2023
Attributed Graph Transformation for Generating Synthetic Benchmarks for Hardware Security.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023

2022
Analysis of the Satisfiability Attack Against Logic Encryption Using Synthetic Benchmarks.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021
SRTLock: A Sensitivity Resilient Two-Tier Logic Encryption Scheme.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2021


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