Jun Seomun
According to our database1,
Jun Seomun
authored at least 12 papers
between 2007 and 2013.
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Bibliography
2013
Proceedings of the 2013 IEEE International Test Conference, 2013
Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
Maximizing Frequency and Yield of Power-Constrained Designs Using Programmable Power-Gating.
IEEE Trans. Very Large Scale Integr. Syst., 2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the International SoC Design Conference, 2012
2011
IEEE Trans. Very Large Scale Integr. Syst., 2011
2010
Power gating: Circuits, design methodologies, and best practice for standard-cell VLSI designs.
ACM Trans. Design Autom. Electr. Syst., 2010
Proceedings of the 47th Design Automation Conference, 2010
Bounded potential slack: enabling time budgeting for dual-Vt allocation of hierarchical design.
Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010
2009
Proceedings of the 2009 International Symposium on Low Power Electronics and Design, 2009
2008
Skewed Flip-Flop and Mixed-V<sub>t</sub> Gates for Minimizing Leakage in Sequential Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
2007
Proceedings of the 44th Design Automation Conference, 2007