Jun Matsushima

According to our database, Jun Matsushima authored at least 17 papers between 2008 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Test Point Insertion for Multi-Cycle Power-On Self-Test.

Senling Wang, Xihong Zhou, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

ACM Trans. Design Autom. Electr. Syst., 2023

A New Framework for RTL Test Points Insertion Facilitating a "Shift-Left DFT" Strategy.

Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima, Oussama Laouamri, Naveen Khanna, Jeff Mayer, Nilanjan Mukherjee

Proceedings of the IEEE International Test Conference, 2023

2021

A Power Reduction Method for Scan Testing in Ultra-Low Power Designs.

Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

Proceedings of the 30th IEEE Asian Test Symposium, 2021

2020

FF-Control Point Insertion (FF-CPI) to Overcome the Degradation of Fault Detection under Multi-Cycle Test for POST.

Hanan T. Al-Awadhi, Tomoki Aono, Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

IEICE Trans. Inf. Syst., 2020

2018

Automotive Functional Safety Assurance by POST with Sequential Observation.

Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Jun Matsushima

IEEE Des. Test, 2018

Innovative practices on test in Japan.

Koji Asami, Yoshiro Tamura, Haruo Kobayashi, Jun Matsushima, Yoichi Maeda, Kazumi Hatayama

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Fault-detection-strengthened method to enable the POST for very-large automotive MCU in compliance with ISO26262.

Senling Wang, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

Proceedings of the 23rd IEEE European Test Symposium, 2018

Capture-Pattern-Control to Address the Fault Detection Degradation Problem of Multi-cycle Test in Logic BIST.

Senling Wang, Tomoki Aono, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima

Proceedings of the 27th IEEE Asian Test Symposium, 2018

2017

A 16 nm FinFET Heterogeneous Nona-Core SoC Supporting ISO26262 ASIL B Standard.

Shinichi Shibahara, Chikafumi Takahashi, Kazuki Fukuoka, Yuko Kitaji, Takahiro Irita, Hirotaka Hara, Yasuhisa Shimazaki, Jun Matsushima

IEEE J. Solid State Circuits, 2017

Automotive IC On-line Test Techniques and the Application of Deterministic ATPG-Based Runtime Test.

Yoichi Maeda, Jun Matsushima, Ron Press

Proceedings of the 26th IEEE Asian Test Symposium, 2017

2016

4.5 A 16nm FinFET heterogeneous nona-core SoC complying with ISO26262 ASIL-B: Achieving 10-7 random hardware failures per hour reliability.

Chikafumi Takahashi, Shinichi Shibahara, Kazuki Fukuoka, Jun Matsushima, Yuko Kitaji, Yasuhisa Shimazaki, Hirotaka Hara, Takahiro Irita

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Structure-Based Methods for Selecting Fault-Detection-Strengthened FF under Multi-cycle Test with Sequential Observation.

Senling Wang, Hanan T. Al-Awadhi, Soh Hamada, Yoshinobu Higami, Hiroshi Takahashi, Hiroyuki Iwata, Jun Matsushima

Proceedings of the 25th IEEE Asian Test Symposium, 2016

Multi-configuration Scan Structure for Various Purposes.

Hiroyuki Iwata, Jun Matsushima

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2012

A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule.

Masanori Kurimoto, Jun Matsushima, Shigeki Ohbayashi, Yoshiaki Fukui, Michio Komoda, Nobuhiro Tsuda

ACM Trans. Design Autom. Electr. Syst., 2012

An Effective At-Speed Scan Testing Approach Using Multiple-Timing Clock Waveforms.

Hiroyuki Iwata, Yoichi Maeda, Jun Matsushima, Masahiro Takakura

Proceedings of the 21st IEEE Asian Test Symposium, 2012

2010

A yield improvement methodology based on logic redundant repair with a repairable scan flip-flop designed by push rule.

Masanori Kurimoto, Jun Matsushima, Shigeki Ohbayashi, Yoshiaki Fukui

Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

2008

CooLBIST: An Effective Approach of Test Power Reduction for LBIST.

Jun Matsushima, Yoichi Maeda, Masahiro Takakura

Proceedings of the 17th IEEE Asian Test Symposium, 2008